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Efficient RF to Bits: Circuit Design Insights

Learn about RF gain, noise considerations, down-conversion, low noise amplifiers, matching networks, mixers, and filters to optimize circuit performance from analog RF signals to digital bits. Explore passive mixer design, filter frequency ranges, and intricate details of designing high-order passive IIR filters for improved signal processing. Discover the nuances of implementing complex poles and designing passive signal processing filters for different applications. Dive into the world of circuit design for robust RF signal processing and data extraction into bits.

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Efficient RF to Bits: Circuit Design Insights

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  1. Circuits from RF to BitsEE194 Brad Wheeler

  2. Block Diagram • RF gain • Noise reasons • Down-conversion • Easier to build low frequency circuits • Signal processing • More gain, filtering • Digitization/demodulation • Extract the information

  3. To LNA or Not to LNA? • Low Noise Amplifier (LNA) provides RF gain • LNA Design Recipe • Start with common source/gate • Add inductors • Burn lots of current • Pros • Lower Noise Figure • Better sensitivity • Cons • Power consumption Razavi, Behzad, and RazaviBehzad. RF microelectronics. Vol. 2. New Jersey: Prentice Hall, 1998.

  4. Matching Networks • Achieve RF gain using LC resonance instead of active elements • Topologies • L, Pi, tapped element • Metrics • Gain • Must account for loading • Input impedance • Bandwidth • Tuning • Noise Cr: Prof Niknejad, EE142

  5. Matching Network Gain • Series to parallel transformation • Loaded vs unloaded • Realistic on-chip inductors • Q ~ 10-15+ • L ~ pH to nH (10nH roughly 200um*200um)

  6. Matching Network Gain Unloaded

  7. Matching Network Gain Unloaded Loaded, Q=15

  8. Down-Conversion Mixers • Move signal from RF (GHz) to Intermediate Frequency (MHz) • Metrics • Input impedance • Gain • Noise • Linearity • Passive vs Active Razavi, Behzad, and RazaviBehzad. RF microelectronics. Vol. 2. New Jersey: Prentice Hall, 1998.

  9. Passive Mixers • Input impedance • Noise • Gain • Sinc(Duty Cycle) Razavi, Behzad, and RazaviBehzad. RF microelectronics. Vol. 2. New Jersey: Prentice Hall, 1998.

  10. Passive Mixers • Transparency • N-path filter • Limited by Ron/Rs • Andrews/Molnar • Hard switching, multiple phases • Cook/Berny • Resonant, sinusoidal drive

  11. Hard Switching • Rail to rail switch drivers • Multiple clock phases, non-overlapping inputs • Higher performance, higher power to drive Andrews, Caroline, and Alyosha C. Molnar. "Implications of passive mixer transparency for impedance matching and noise figure in passive mixer-first receivers." IEEE Transactions on Circuits and Systems I: Regular Papers 57.12 (2010): 3092-3103.

  12. Sinusoidal Drive • Can also resonate out switch gate capacitance in LC tank • Sinusoidal waveform yields approximately square conduction cycle • Lower LO power, but fewer phases available Cook, Ben W., et al. "Low-power 2.4-GHz transceiver with passive RX front-end and 400-mV supply." IEEE Journal of Solid-State Circuits 41.12 (2006): 2757-2766.

  13. Receiver Components • RF gain • Noise reasons • Down-conversion • Easier to build low frequency circuits • Signal processing • More gain, filtering • Digitization/demodulation • Extract the information

  14. IF Amplifiers • Direct conversion vs heterodyne • DC offsets, flicker noise • We need amplifiers/filters in the MHz range • First active amplifier becomes the noise vs power limiting factor

  15. Filters • Why filter? • Interference • Noise • More options than Baskin Robbins • Discrete time (DT) vs continuous time (CT) • Aliasing • Active vs passive

  16. CT Filters Tow-Thomas Biquad Active Ladder Filter Passive Ladder Filter Gm-C Filter Cr: Prof Boser, EE240C

  17. Filter Frequency Ranges Cr: Prof Boser, EE240C

  18. (Active) Switched Capacitor • Transfer function set by clocks, capacitor ratios • Very precise control • Active = Charge being pushed around by opamps Cr: Prof Boser, EE240C

  19. Passive Switched Capacitor • Transconductor converts input to charge • Passive charge sharing defines filtering • Poles determined by capacitor ratios Continuous time gain and anti-alias filtering Discrete time filtering Tohidian, Massoud, Iman Madadi, and Robert BogdanStaszewski. "Analysis and design of a high-order discrete-time passive IIR low-pass filter." IEEE Journal of Solid-State Circuits 49.11 (2014): 2575-2587.

  20. High Order Poles • One transconductor, many switches and caps • Can only implement poles on the real axis with this topology Tohidian, Massoud, Iman Madadi, and Robert BogdanStaszewski. "Analysis and design of a high-order discrete-time passive IIR low-pass filter." IEEE Journal of Solid-State Circuits 49.11 (2014): 2575-2587.

  21. Complex Conjugate Poles • Negative feedback allows to move poles off real axis • Limited to low quality factor Invert Polarity Lulec, SevilZeynep, David A. Johns, and Antonio Liscidini. "A simplified model for passive-switched-capacitor filters with complex poles." IEEE Transactions on Circuits and Systems II: Express Briefs 63.6 (2016): 513-517.

  22. Complex Filters • By combining charge from In-phase and Quadrature samples, can make filters asymmetric about 0 Hz Madadi, Iman, MassoudTohidian, and Robert Bogdan Staszewski. "Analysis and design of I/Q charge-sharing band-pass-filter for superheterodyne receivers." IEEE Transactions on Circuits and Systems I: Regular Papers 62.8 (2015): 2114-2121.

  23. Passive FIR Cook, Benjamin W., and Axel D. Berny. "Passive discrete time analog filter." U.S. Patent No. 8,849,886. 30 Sep. 2014.

  24. Previous Filter Design (Simulated) • Cascade of IIR & FIR blocks • 4th order filter centered at 2.5MHz with Fs = 100 MHz • 1-bit zero crossing demodulator • High sampling frequency • Gain requirements • Offset cancellation

  25. ADC/Comparator • Sample rate, number of bits, etc driven by system level modeling • Filter type/passband • Demodulator • Simplest ADC is just a comparator (1-bit) • Demodulate FSK by counting time between zero crossings of square wave

  26. Clocked Comparators Strongarm Double Tail Razavi, Behzad. "The StrongARM Latch [A Circuit for All Seasons]." Solid-State Circuits Magazine, IEEE 7.2 (2015): 12-17. Schinkel, Daniel, et al. "A double-tail latch-type voltage sense amplifier with 18ps setup+ hold time." Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International. IEEE, 2007.

  27. Design Considerations • Power, offset, speed, noise • Lower offset either by up-sizing input devices, or by adding correction • Both cost more power • Pelgrom, Monte Carlo • Offset calibration schemes • Current tuning • Capacitor DAC • Body bias

  28. Simulation Issues • Switched capacitor circuits require special simulation techniques • Periodic Steady State (PSS) • Compute a solution around a time varying operating point • Periodic Versions of all the normal analysis • PAC • PNoise

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