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4GFC Amplitude Budget Spreadsheet. Mike Jenkins. Summary of Contents (1 of 2):. Amplitude Budget Spreadsheet Details of Amplitude Budget penalties: Near End & Far End Voltage Relationships Interconnect Mismatch Penalty Examples: SMA Compliance Interconnect (measured)
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4GFC Amplitude Budget Spreadsheet Mike Jenkins T11/04-009v0
Summary of Contents (1 of 2): • Amplitude Budget Spreadsheet • Details of Amplitude Budget penalties: • Near End & Far End Voltage Relationships • Interconnect Mismatch Penalty • Examples: • SMA Compliance Interconnect (measured) • XAUI Backplane (measured) • Amplitude Spreadsheet Values (simulated) T11/04-009v0
Summary of Contents (2 of 2): • Formula for eye at far end of Compliance Interconnect is slightly pessimistic (but probably compensated by other real, eye-closing measurement effects) • Formula for impedance mismatch is slightly optimistic (i.e., eye closes more than predicted) • Formula for eye closure due to multi-reflection penalty appears to be very optimistic • With worst case variations in impedance of backplane, PCB (after beta-R point) & RX termination, eye closure can be extreme (305 mV out of Interconnect at beta R can reduce to 90 mV at alpha R) T11/04-009v0
TX -> RX Amplitude BudgetDouble click to access live Excel spreadsheet(Measured examples on SMA CI & Backplane tabs) T11/04-009v0
Compliance Interconnect Eye Opening (1 of 2) Near End Far End V1 V2 V3 V4 EMPH=1-V2/V1 Atten(f/2)=V4/V1 Atten(f/10)=V3/V2 T11/04-009v0
Compliance Interconnect Eye Opening (2 of 2) V4 Far End V3 EYE EYE = 2*V4 – V3 = V1{2*Atten(f/2) – (1-EMPH)*Atten(f/10)} T11/04-009v0
Interconnect Mismatch (1 of 2) rtr,bT = 2 ZI / (ZT+ZI) rtr,bR = 2 ZR / (ZI+ZR) TX bT bR ZI ZT ZR -12 dB > 20 LOG10 |(ZT-ZREF)/ (ZT+ZREF)| -12 dB > 20 LOG10 |(ZI-ZREF)/ (ZI+ZREF)| -12 dB > 20 LOG10 |(ZR-ZREF)/ (ZR+ZREF)| Q = 10-12/20 = 0.251 so max ZT, ZI, ZR = ZREF (1+Q)/(1-Q) = 1.671 ZREF = ZMAXand min ZT, ZI, ZR = ZREF (1-Q)/(1+Q)= 0.598 ZREF = ZMIN T11/04-009v0
Worst case is ZT = ZMAX TX voltage measured with ZI = ZR = ZREF : rtr,bT = 2 ZR / (ZMAX+ZR) rtr,bR = 2 ZR / (ZR+ZR) = 1 In w/c system, ZI = ZMIN: rtr,bT = 2 ZMIN/(ZMAX+ZMIN) rtr,bR = 2 ZR / (ZMIN+ZR) Therefore, ratio of actual w/c voltage in system to voltage measured with ideal ZREF interconnect is: [2 ZMIN * 2 ZR * (ZMAX+ZR)]/ [2 ZR (ZMAX+ZMIN)(ZMIN+ZR)] = [2(1-Q)/(1+Q)] [2/(1-Q)] / [2(1+Q2)/(1-Q2)] [2/(1+Q)] = (1-Q2)/(1+Q2) Interconnect Mismatch (2 of 2) T11/04-009v0
Measured example:SMA Compliance Interconnect zero length measurement thru Compliance Interconnect 1541 mVdpp 966 mVdpp 785 mVdpp 574 mVdpp EMPH = 1-966/1541 = 37.3% Att(F/2) = 574/1541 = -8.58 dB Att(F/10) = 785/966 = -1.80 dB T11/04-009v0
Measured example:XAUI Backplane 1650 mVdpp 1034 mVdpp 828 mVdpp 524 mVdpp EMPH = 1-1034/1650 = 37.3% Att(F/2) = 524/1650 = -9.96 dB Att(F/10) = 828/1034 = -1.93 dB T11/04-009v0
Simulated example:Amplitude Spreadsheet Values (Summary of 6 following slides) • 928 mVdpp with 38% pre-emphasis yielding 570 mVdpp near end eye Compares well with spreadsheet formula • (Same as #1) with TX termination at ZMAX (167W) Same. TX voltage adjusted to deliver same p-p thru higher R • (Same as #2) thru Compliance Interconnect 377 mVdpp eye compared with 310 mVdpp in spreadsheet (+22% error) • (Same as #3) with Interconnect at ZMIN (60W) 305 mVdpp eye compared with 274 mVdpp in spreadsheet (+11% error) • (Same as #4) with 4.2” of 167W (ZMAX) PCB trace added after beta R 188 mVdpp eye lower than 242 mVdpp in spreadsheet (-23% error) • (Same as #5) with RX termination at ZMIN (60W) 90 mVdpp eye opening Note: Percent errors are cumulative (e.g., +11% implies that formula in #4 partially compensated for +22% error due to formula in #3). T11/04-009v0
#1 • P-P TX ampl (Min) • min TX Ampl • 38% Emphasis • nom ZT • 570 mV ~ (1-38%) x 928 mV T11/04-009v0
#2 • P-P TX ampl (Min) • min TX Ampl • 38% Emphasis • max ZT • 570 mV ~ (1-38%) x 928 mV T11/04-009v0
#3 • Min Compliance Interconnect Eye • min TX Ampl • 38% Emphasis • max ZT • Compliance Channel @ nom ZI • 377 mV compares with 311 mV in spreadsheet T11/04-009v0
#4 • Interconnect mismatch (beta R) • min TX Ampl • 38% Emphasis • max ZT • Interconnect (same loss as CI) @ min ZI • 305 mV compares with 274 mV in spreadsheet T11/04-009v0
#5 • Multi-reflection Penalty (1 of 2) • min TX Ampl • 38% Emphasis • max ZT • Interconnect (same loss as CI) @ min ZI • PCB (after beta R) @ max Z • ZR @ nomZ • 188 mV compares with 242 mV in spreadsheet • ?? T11/04-009v0
#6 • Multi-reflection Penalty (2 of 2) • min TX Ampl • 38% Emphasis • max ZT • Interconnect (same loss as CI) @ min ZI • PCB (after beta R) @ max Z • ZR @ min Z • 90.4 mV compares with 242 mV in spreadsheet • ??? T11/04-009v0