1 / 5

IBIS FUTURES COMMITTEE MULTILINGUAL MODEL: [Circuit Call] REFERENCES

IBIS FUTURES COMMITTEE MULTILINGUAL MODEL: [Circuit Call] REFERENCES. John Angulo 8 th April 2004. BIRD 75.8 Assumptions. [External Circuit] Other than D_drive/D_enable/D_receive, ports have no predefined meaning or connection [Circuit Call] instantiates and connects them [External Model]

sandra_john
Download Presentation

IBIS FUTURES COMMITTEE MULTILINGUAL MODEL: [Circuit Call] REFERENCES

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. IBIS FUTURES COMMITTEEMULTILINGUAL MODEL:[Circuit Call] REFERENCES John Angulo 8th April 2004

  2. BIRD 75.8 Assumptions • [External Circuit] • Other than D_drive/D_enable/D_receive, ports have no predefined meaning or connection • [Circuit Call] instantiates and connects them • [External Model] • All ports have predefined meanings and connections per IBIS version 4.0 • [Pin] keyword instantiates and connects them • Assumptions • [External Circuit] will model any buffer technology old IBIS can’t handle • Old IBIS structure is inflexible, so limit [External Model] to an upgrade path ICD, Multiligual Model: Digital Port Issues, 25th March 2004 Non Company Confidential

  3. BIRD 75.8 Limitations • [External Circuit] can’t quite model a buffer • No timing test load… no flight time compensation • No measurement thresholds… no flight time, overshoot, hysteresis measurements • [External Circuit] can’t talk to a buffer model • We can only connect an [External Circuit] to other [External Circuit]s • Use [External Circuit] for the interconnect… can’t use [Model] or [External Model] for the buffer • Multilingual approach is limited in practice to package/interconnect or the buffer, not both • [External Circuit] behavioral parameters for buffer modeling are still pending ICD, Multiligual Model: Digital Port Issues, 25th March 2004 Non Company Confidential

  4. Practical Solution • Let [Circuit Call] reference [Model] • No syntax changes necessary • Available ports are already enumerated in BIRD 75.8 • Could use advanced package or die interconnect model together with multilingual buffer model, or old IBIS model • No conflicts between old IBIS and nodal connections • We already handle incomplete port mappings by defaulting to internal values, as seen in HSPICE • We already let the user choose between internal values and external port mappings, as in HSPICE power={on|off} ICD, Multiligual Model: Digital Port Issues, 25th March 2004 Non Company Confidential

  5. ICD, Multiligual Model: Digital Port Issues, 25th March 2004 Non Company Confidential

More Related