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Plans for Low-Level Radio Frequency

Plans for Low-Level Radio Frequency. Hengjie Ma NSLS II RF Group NSLS-II ASAC Review, March 26, 2009. Outline. Low-level radio frequency system requirement Implementations Cavity field controller Phase reference scheme and LLRF frequencies Preliminary plan for system integration

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Plans for Low-Level Radio Frequency

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  1. Plans for Low-Level Radio Frequency Hengjie Ma NSLS II RF Group NSLS-II ASAC Review, March 26, 2009

  2. Outline Low-level radio frequency system requirement Implementations Cavity field controller Phase reference scheme and LLRF frequencies Preliminary plan for system integration Status of LLRF R&D Rev. 1, 2 controller prototypes and test results LLRF standard frequency synthesizer Master oscillator phase noise test set Conclusions

  3. Low-level RF System Requirement • Functions of Low-level RF System • Provide a RF reference for accelerator/experiments (Master Oscillator) • Regulates cavity field for required RF stability • Monitors RF powers to provide equipment protections • Provide RF signal data for operation and archiving.

  4. Low-level RF System Requirement • Basic LLRF functionalities – 1 of 4 • Master Oscillator 499.68 MHz ± 10 kHz – physics and user experiments require that the RF master oscillator must meet the following requirements ; • Phase jitter: << 0.16 deg. RMS, from 500 Hz to 50 kHz * , • Frequency tuning range : > +/- 30 kHz, • Frequency resolution: < 1 Hz (at least) ** • * An equivalent phase noise power density of -87dBc/Hz from 0.5 to 50 kHz, it also a total phase noise budget for the RF system. • ** E. Weihreter, J. Rose, “Some comments on the choice of rf master generators for NSLS II,” Technical note, October, 2007

  5. Low-level RF System Requirement • Basic LLRF functionalities – 2 of 4 • Cavity Field Controller – RF stability is also subject to the total phase error budget of 0.16 deg. RMS(PDR). The basic requirement for the field control thus includes • Wideband * feedback control (P-I, or “fast feedback”) for • reducing cavity shunt impedance, thus reducing transient beam loading and suppressing Robinson instability, • linearizing RF PA • reduce other random perturbations in the system (such as noise in high-power RF ). • * A successful implementation of a wideband feedback control to a large degree depends on the amount of loop delay in the system, as the product of loop gain Kp and bandwidth ω1/2 is subject to a constraint set by the loop delay τas

  6. Low-level RF System Requirement • Basic LLRF functionalities – 3 of 4 • Cavity Field Controller • Delayed-feedback loops (such as Turn-by-Turn), • Cavity resonance/tuning control (frequency loop) • Sufficient number of RF input channels for allowing to implement various feedback loops, and monitoring the high-power RF. • RF reference / Cavity field pickup (s)* • Forward / reflected power at cavity input * • Forward / reflected power at PA output • Forward / reflected power at circulator load port • Forward / reflected power at PA input* • Beam pickup(s) * • * required signal inputs, minimum 7 channels.

  7. Low-level RF System Requirement • Basic LLRF functionalities – 4 of 4 • The RF operations also require additional functionalities, including • Exception-handling and equipment protections (interlocks) • Synchronism with machine events (timing, trigger I/Os) • Output frequency variation (off standard RF) capability – for facilitating cavity testing/conditioning, or RF system transfer function measurements. • Signal waveform data viewing and archiving ( data streaming, buffers) • Communication ports to local/remote computer host for controls and data transfer.

  8. Low-level RF System Implementation • Cavity field controller implementation – 1 of 3 • An all-digital, FPGA implementation is chosen for • Concurrent processing • Short DSP latency, • More signal I/O • Flexibility

  9. Low-level RF System Implementation • Controller implementation – 2 of 3 Peripheral around FPGA • 14-bit resolution for RF I/O (to meet the 0.16 deg. precision requirement *) * S. Simrock, “Digital low-level RF controls for the future superconducting Linac colliders,”, PAC05

  10. Low-level RF System Implementation • Cavity field controller implementation – 3 of 3 • Direct Digital Synthesis (DDS) of LLRF output signal is chosen for having a precision linear control and greater dynamic range on the output (vs. an analog vector modulator). • Performance is proven, • Basic principle of FPGA implementation • is the same as of a standard DDS; • Given Phase increment size = 2N • here, N= 3, jump size M=5, and • Fclk=80MHz (LLRF clock). • Thus, synthesized IF frequency

  11. Low-level RF System Implementation • Phase reference scheme & LLRF frequencies – 1 of 2 • Choose 500MHz RF as reference for • Straightforward phase comparison • Allows differential measurement • Choice of LLRF processing frequencies • Intermediate Freq. IF = 50MHz • 1st LO = RF + IF = 550MHz (SR, BR) • 2nd LO = 5*RF = 2500MHz (LINAC) • 2nd LO = 2*RF = 1000MHz (Landau) • Considerations for the freq. choice include • the compatibility with the proven FPGA LLRF • design LLRF4 (LBNL), or FCM (SNS).

  12. Low-level RF System Implementation • Phase reference scheme & LLRF frequencies – 2 of 2 • Same field controller hardware is used in SR, BR, and LN. • 3GHz (in LINAC) and 1.5GHz (in Landau) are down converted to standard 500MHz first, then converted to 50MHz IF with 550MHz LO as in Storage Ring and Booster • LINAC : 3000MHz – 2500MHz (2nd LO) = 500MHz • Landau: 1500MHz – 1000MHz (2nd LO) = 500MHz

  13. Low-level RF System Implementation • Phase noise performance of Possible Master Oscillator • Total RMS jitter estimated < 4.3e-4(rad.) = 0.025 deg. (1 Hz~100 kHz) << 0.16 deg • Frequency variation step size : 0.001 Hz • Phase continuity maintained during frequency change

  14. Low-level RF System Implementation • Preliminary plan for system integration • LLRF is organized in clusters for the sub-systems (SR, BR and LN etc.). In each cluster, devices are centered around a master concentrator (under development in Controls) in a star configuration, connected by high-speed serial links. • The Gbps up/down links of the concentrators are connected together in a ring configuration, providing a capability of inter-sub-system communication, and also a method to merge LLRF into the accelerator controls infrastructure. • Much of the details is TBD at this time.

  15. LLRF R&D Status - summary • 1st generation digital LLRF controller board has been designed. Two versions (Rev1, Rev.2) haven been designed and fabricated. • Rev.1 is intended for in-lab tests and development. One sample was constructed, and is being characterized. • Rev.2 is intended for supporting the near-term RF development activities, including the booster cavity frequency tuning tests, and field tests (CLS planned). Four samples are being constructed. • LLRF standard frequency synthesizer - designed / constructed . • Master Oscillator phase noise test set - designed/constructed.

  16. LLRF R&D Status – field controller • Rev. 1 cavity field controller under test – verified functions of IF ADC/DAC, TTL trigger I/O, MATLAB API(w/ help from staff of Controls)

  17. LLRF R&D Status – field controller • Rev. 1 cavity field controller: IF input channel characterization • The ADC channel under test is driven by a 50 MHz Sine-wave input and a 40 MHz clock, produced by two low-noise crystal oscillators. • The SNR of ADC input channels • is a critical factor that limits the • performance of a digital LLRF. • Test results indicate that the -73dB SNR • spec. of the ADC device is generally met, • and with a measured spurious-free – • dynamic range of -81dB. (analyzed from • 4M samples of 50 MHz IF signal)

  18. LLRF R&D Status – field controller • Rev. 1 cavity field controller: IF input channel characterization • An important part of the ADC SNR is the close-in phase noise from ADC aperture jitter: • The test result shows that on this • Rev.1 controller prototype, the • measured ADC’s aperture jitter’s • contribution to the phase noise • is ~0.00629 deg RMS. (4M samples) • Input channel distortion was also checked (with 2-tone input for IM).

  19. LLRF R&D Status – field controller • Rev. 1 cavity controller: directly digital synthesized 50MHz output spectrum purity was also checked (more quantifying tests)

  20. LLRF R&D Status – field controller • Rev.2 version has been designed and fabricated with improvement in: • Addition of integrated - • RF-IF up/down conversion, • Enhanced device cooling, • Standard 1U 19” chassis • packaging, • 4 samples are being made • for supporting RF development tasks.

  21. LLRF R&D Status – Frequency standards • LLRF coherent frequency standard • All LLRF frequencies used in LLRF , 10, 40, 50, 80, 500, and 550MHz, are derived from a common ULN 10MHz time-base of MO, maintaining the coherency, synchronism, and phase relationship.

  22. LLRF R&D Status – Frequency standards • LLRF coherent frequency standard and MO phase noise correlation test set have been designed and constructed..

  23. Conclusion and Near-term Goals • The LLRF plans address both the near-term needs, and a path for future upgrades and expansions. • The test on the 1st generation LLRF field controller has yield some promising results, and both the controller prototype and MO system provide a good development platform. • The near-term goals include finishing the Rev.2 controller hardware, fabrication, and testing, • Develop the Rev.2 software/firmware necessary for supporting RF development activities (may need assistance from Controls) • Start studying the issues in the control timing/synchronization, communication between the front-end and the concentrators, and interface with control infrastructure (working with Controls)

  24. Acknowledgement TEAM RF JAMES ROSE (group leader), HENGJIE MA JOHN CUPOLO, JORGE OLIVA, ROBER SIKORA, NATHAN TOWNE(contractor)

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