Lecture 32 Some IC circuits

1. Lecture 32Some IC circuits Amit Kumar Mishra ECE, IIT G

2. Active Filters: Tow-Thomas Biquad

3. Active Filters: Complete Tow-Thomas Biquad The Tow-Thomas Biquad can achieve all filter functions with addition of extra passive components as shown.

4. Active Filters: Tow-Thomas Biquad (Example) Problem: Design band-pass filter using Tow-Thomas circuit Given data: fo = 5 kHZ, BW = 200 Hz, midband gain =20 Unknowns: R, R1, R2, R3, C Analysis:

5. Magnitude Scaling Magnitude of filter impedances may all be increased or decreased by a magnitude scaling factor KM, without changing wo or Q of the filter. To scale the magnitude of the impedance of the filter elements: Applying magnitude scaling to low-pass filter:

6. Frequency Scaling Cutoff or center frequencies of filter may be scaled by a frequency scaling factor KF, without changing Q of the filter if each capacitor value is divided by KF and resistor values are left unchanged. Applying frequency scaling to low-pass filter:

7. Switched-Capacitor Circuits Switched-capacitor (SC) circuits eliminate resistors in filters by replacing them with capacitors and switches. Resulting filters are discrete-time or sampled-data equivalents of continuous-time filters discussed so far. Provide additional flexibility not readily available in continuous-time form, such as inversion of signal polarity without using an amplifier. SC circuits are compatible with high density MOS IC processes. SC circuits provide low-pass filters and CMOS ICs for signal processing and communications applications.

8. SC Integrator

9. Equivalence Between SC Integrator and Continuous Time Integrator Equating this charge to charge stored on C1 fC is clock frequency. For a capacitance of 1 pF and switching frequency of 100 kHz, equivalent resistance is 10 MOhm which is too large for IC realization.

10. Noninverting SC Integrator

11. Stray-Insensitive SC Circuits

12. Switched-Capacitor Band-Pass Filter

13. Switched-Capacitor Tow-Thomas Biquad Ability of SC circuits to change polarities without an amplifier eliminate one op amp in the SC implementation.

14. Digital-to-Analog (D/A) Converters: Fundamentals In a DAC, an n-bit binary input word (b1,b2,�bn) is combined with reference voltage VREF to give output of the DAC. Full-scale voltage VFS is related to VREF of the converter by where K determines converter gain commonly set to 1. VOS, the offset voltage of the converter characterizes the DAC output when the digital input code is zero.Offset voltage is normally adjusted to zero. The smallest voltage change at DAC output occurs when the LSB bn in the digital word changes from a 0 to 1 is also called resolution. b1, the MSB has a weight of one-half VFS

15. D/A Converter Specifications: Offset and Gain Errors Maximum output of ideal converter is always 1 LSB smaller than VFS. For shown ideal DAC characteristic, 0.875 VFS corresponds to maximum output code of 111. Gain error of converter represents deviation of slope of converter transfer function from that of corresponding ideal DAC. Shown ideal DAC has been calibrated so that VOS =0 and 1 LSB is VFS /8. Offset voltage is output of converter for zero binary input code.

16. D/A Converter Specifications: Linearity Errors Overall linearity error is magnitude of largest error that occurs.Good converter has linearity error<0.5 LSB (Why??) Differential linearity error is magnitude of maximum difference between actual output step of converter and ideal output step size for 1 LSB. Integral linearity error for a given binary input is the sum (integral) of differential linearity errors for inputs up through the given input.

17. D/A Converter Specifications: Monotonicity If the output of the DAC does not increase in a monotonic manner if the input code is increased, the DAC is said to be nonmonotonic.

18. Weighted-Resistor DAC Drawbacks: Need to have accurate resistor ratios over a wide range of resistor values. Switches in series with resistors require zero offset voltage and low on-resistance. Current drawn form reference varies with input pattern causing change in voltage drop in Thevenin equivalent source resistance of reference leading to data-dependent errors called superposition errors.

19. R-2R Ladder Avoids weighted-resistor DAC problem of wide range of resistor values. Well-suited to IC realization as it requires matching of only two resistor values, R and 2R.

20. Inverted R-2R Ladder Currents in ladder and reference are independent of digital input. Complementary currents are available at output of inverted ladder. Switches still need to have low on-resistance to minimise errors.

21. Inherently Monotonic DAC Analog switch tree connects desired tap to input of an op amp operating as a voltage follower. Each tap on resistor network is forced to produce voltage grater than or equal to the taps below it , forcing the output to increase monotonically as the digital input code increases. An 8-bit version requires 256 equal-valued resistors, 510 switches and additional decoding logic.

22. Switched-Capacitor DACs Since circuits consist only of capacitors and switches, static power dissipation occurs only in the op amps. Dynamic switching losses occur. When switch changes state, current impulses charge/discharge network capacitos, changing voltage on feedback capacitor by an amount corresponding to bit weight of switch that changed state. Circuits represent direct SC analogs of weighted-resistor and R-2R ladder DACs.Consume very less power.

23. DACs in Bipolar Technology Bipolar transistors aren�t good voltage switches due to their inherent offset voltage in saturation, but, are very good current sources and switches.

24. DACs in Bipolar Technology (contd.)

25. Reference Current Circuitry for Bipolar Implementations of DACs

26. Many Thanks