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Randy J. Chen Apr. 15, 2013. Cyclic Node Merging Outline. Motivation Problem Formulation Cyclic Substitute Node (CSN) Added Cyclic Substitute Node (ACSN) Multiple Loops Handling Proposed Flow Future Work. Cyclic Node Merging Motivation (1/5). Yung- Chih Chen (2009):
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Randy J. Chen Apr. 15, 2013
Cyclic Node Merging Outline • Motivation • Problem Formulation • Cyclic Substitute Node (CSN) • Added Cyclic Substitute Node (ACSN) • Multiple Loops Handling • Proposed Flow • Future Work
Cyclic Node Merging Motivation (1/5) • Yung-Chih Chen (2009): Mergers can be efficiently found by logic implications. a (0,X) v4 1. Compute MAs (nt= sa0) 2. Compute MAs (nt= sa1) 3. Sustitude node ns nodes having different values in MAs (nt = sa0) and MAs (nt = sa1), but not in the transitive fanout cone of nt (1,0) v1 (1,1) b (1,1) v2 (0,0) v5 (1,0) c (1,0) v3 (1,0) d MAs(v3=sa0): {v3=1, c=0, d=1, v2=1, v5=1,b=1,v1=1, v4=0} MAs(v3=sa1): {v3=0, v5=0,v2=1, c=0, b=1, d=0, v1=0}
Cyclic Node Merging Motivation (2/5) • Is it possible that we merge nt=v3 with ns=v5which is in the transitive fanout cone (TFC) of v3? a (0,X) v4 (1,0) v1 (1,1) b (1,1) v2 (0,0) v5 (1,0) c (1,0) v3 (1,0) d Replacing v3 with v5?
Cyclic Node Merging Motivation (3/5) • Leon Stok (1992): Cyclic circuits inadvertently produced during design. always @ * begin if (opc==0) f = (a + b) << c; else f = (a << c) + b; end a a opc 1 0 0 1 opc b c << + opc 0 1 f
Cyclic Node Merging Motivation (4/5) • Marc D. Riedel (2003): Introducing feedback in substitution phase can further reduce the area. • a • d • c • g • a = x1c + c’d • b = x0’(x1d + c) • c = x0x2x3’ + x2’(x0’x1’ + d) • d = x1’x2’x3 + x3’(x1x2’ + x2(x0’ + x1’)) • e = b + x3’cd • f = x1’x2’ + a’c + de’ • g = a + b’f • a = x1’c + x0’x3’c’ • b = x0’e • c = x0x2x3’ + x2’(x1’x3 + e) • d = x1e+ (x2 + x3)a • e = x3’f’ +x2’(x0’ + x1)f • f = x3’a’ + (x2’ + x0’x1’)g • g = a + x3’b’ • b • f • d • a • e • e • f • b • c • g • Acyclicform of 7-segment display • with literal count = 37 • Cyclicform of 7-segment display • with literal count = 34
Cyclic Node Merging Motivation (5/5) • But their approach spends large amount of time on trial and error. • f1 = x2’x3+ f2’f3 • f2= x1f3’ + x3’f1’ • f3= f1f2’ + x2’x3’ f1 f1 f1 … • f1 = x2’x3+ f2’f3 • f2= x1f3’ + x3’f1’ • f3 = x1’f1 + x2’x3’ cost 12 cost 13 cost 12 f3 f3 f3 f2 f2 f2
Cyclic Node Merging Problem Formulation • Given: a combinational circuit C • Derive: an area-optimized circuit C* • By means of: merging a target node nt and a substitute node ns in nt’s transitive fanout cone • With: efficient logic implications
Cyclic Node Merging Cyclic Substitute Node (1/7) • The most important factor of the cyclic combinational circuit is that all loops in the circuit are false. z = 1 z = 0
Cyclic Node Merging Cyclic Substitute Node (2/7) Theorem 1: Let nt denote a target node and ns denote a substitute node in the transitive fanout cone of nt. Replacing nt with ns forms a set of loops L.If the value changes on nt are never propagated to ns, L is combinational. Proof: 1. As D and D’ cannot be propagated from nt to ns for any input assignment, ns evaluates to a definite Boolean value other than D and D’, which means ns does not depend on nt.
Cyclic Node Merging Cyclic Substitute Node (3/7) Theorem 1: Let nt denote a target node and ns denote a substitute node in the transitive fanout cone of nt. Replacing nt with ns forms a set of loops L.If the value changes on nt are never propagated to ns, L is combinational. Proof: 2. Thus even if we replace ntwith ns, ns will still evaluate to a definite Boolean value (1 or 0), so do all the nodes originally depend on nt. 3. Then the circuit after merging ntand nswill still be combinational since all the nodes have definite outputs for any input assignment.
Cyclic Node Merging Cyclic Substitute Node (4/7) Theorem 1: D and D can NOT be propagated from nt to ns Combinationally equivalent Condition 1: Nodes having different values in MAs (nt= sa0) and MAs (nt= sa1) Functionally equivalent Condition 2: (nt = D & ns = 1) & (nt = D & ns = 0) or (nt= D & ns= 0) & (nt= D & ns= 1) Equivalent
Cyclic Node Merging Cyclic Substitute Node (5/7) • Finding MAs when nt = n1 is stuck-at 0. MAs(n1=sa0): {x=1, z=1,n1=D, y=0, n3=D, n2=0, n5=D, n7=0, n4=0, n6=1, n8=0, n10=0, n9=0, n11=1}
Cyclic Node Merging Cyclic Substitute Node (6/7) • Finding MAs when nt = n1 is stuck-at 1. MAs(n1=sa1): {n1=D, y=0,n3=D, n2=0, n5=D, n11=0}
Cyclic Node Merging Cyclic Substitute Node (7/7) • Merging n1 with n11 dose not change the functionality. MAs(n1=sa1): {n1=D, y=0,n3=D, n2=0, n5=D, n11=0} MAs(n1=sa0): {x=1, z=1,n1=D, y=0, n3=D, n2=0, n5=D, n7=0, n4=0, n6=1, n8=0, n10=0, n9=0,n11=1}
Cyclic Node Merging Added Cyclic Substitute Node (1/5) • Though few cyclic substitute nodes exist in practice, there are still potential CSNs.
Cyclic Node Merging Added Cyclic Substitute Node (2/5) • Driven by a blocking node nb, the added node na also satisfies Condition 2. We name naa maskingACSN.
Cyclic Node Merging Added Cyclic Substitute Node (3/5) • Eight types of masking ACSNs.
Cyclic Node Merging Added Cyclic Substitute Node (4/5) • If no nb = (1,0) or (0,1) exists, nb=(1,X) can be used.In this situation, we call na an induced ACSN. If X1 = 1 implies X2 = 1, then na = (1, 1)(0, 1) = (1, 0) satisfies Condition 2.
Cyclic Node Merging Added Cyclic Substitute Node (5/5) • Eight types of induced ACSNs.
Cyclic Node Merging Multiple Loops Handling (1/12) • Once the first set of loops is constructed, we definitely want more loops. x0 x1 x2 x3 nt ns
Cyclic Node Merging Multiple Loops Handling (2/12) • But how can we guarantee the second set of loops will not destroy the previous one? x0 x1 x2 x3 ? ns nt
Cyclic Node Merging Multiple Loops Handling (3/12) • Method 1: identifying candidate CSNs and testing the combinationality by the SAT-based approach. Original Adding dummy variables
Cyclic Node Merging Multiple Loops Handling (4/12) • Method 1: identifying candidate CSNs and testing the combinationality by the SAT-based approach. Adding dummy variables Making all variables dual-rail
Cyclic Node Merging Multiple Loops Handling (5/12) • Method 1: identifying candidate CSNs and testing the combinationality by the SAT-based approach. • Approximately 3 times more variables and 6 times more clauses would be used. a b f = ab 3 variables 3 clauses f a1 a0 b1 b0 f1 f0 f1= a1b1+ a0b1b0’ f0 = a0b0+ a1b1’b0 10 variables 20 clauses
Cyclic Node Merging Multiple Loops Handling (6/12) • The experimental results show its inefficiency in complex circuits. > 66%
Cyclic Node Merging Multiple Loops Handling (7/12) • The information we need is the influence when ntand nshave different values due to the ODCs. • Since the previous proved condition only guarantees that nt and ns always have the same value when nt can be observed at POs, it does not contain information when nt and ns have inconsistent values. • Thus we need to come up with a method to observe the effect on the SCC inputs caused by the inconsistent values of nt and ns.
Cyclic Node Merging Multiple Loops Handling (8/12) • Method 2: (a) Identifying all the strongly connected components (i.e. SCC1 and SCC2) in the circuit. SCC1 n3 n1 ns nt n2 n4 SCC2 n6 n5
Cyclic Node Merging Multiple Loops Handling (9/12) • Method 2: (b) Finding SCC inputs (n3, n4, and n6) and dominators (n1 and n2) of nt to these inputs. SCC1 n3 n1 ns nt n2 n4 SCC2 n6 n5
Cyclic Node Merging Multiple Loops Handling (10/12) • Method 2: (c) Assigning NCVs to the side inputs of n2,activating nt = ns = 1, and keeping these assignments. SCC1 n3 n1 ns 1 1 nt n2 n4 1 SCC2 1 n6 n5
Cyclic Node Merging Multiple Loops Handling (11/12) • Method 2: (d) Flushing the assignments of ns = 1, activating ns = 0, and observing the differences. SCC1 n3 n1 ns 1 0 nt n2 n4 1 SCC2 1 n6 n5
Cyclic Node Merging Multiple Loops Handling (12/12) • Method 2: (e) Determining if other loops are affected by the mergence of nt and ns according to the following table. Repeating (a) ~ (d) for nt = 0. nt ≠ ns nt = ns
Cyclic Node Merging Proposed Flow Target node nt Derive MAs of nt Find a CSN ns YES Found? NO Find a masking ACSN ns YES Found? NO Find an induced ACSN ns YES Found? Merge nt and ns NO YES Combinational? NO YES More nt? Undo merging nt and ns NO Termination
Cyclic Node Merging Future Work • Implementing the logic implication-based combinationality check.