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Directional and Single-Driver Wires in FPGA Interconnect. Guy Lemieux Edmund Lee Marvin Tom Anthony Yu Dept. of ECE, University of British Columbia Vancouver, BC, Canada. Outline. Motivation Bidirection vs. Directional New detailed routing architecture Which is better?
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Directional and Single-Driver Wiresin FPGA Interconnect Guy Lemieux Edmund Lee Marvin Tom Anthony Yu Dept. of ECE, University of British Columbia Vancouver, BC, Canada
Outline • Motivation • Bidirection vs. Directional • New detailed routing architecture • Which is better? • Tristate vs. Single-Driver • HSPICE results • Which is better? • Place & Route Results • Conclusions
Motivation: Bidirectional Wires Interconnect Logic
Motivation: Bidirectional Wires Problem Half of TristateBuffers LeftUnused Buffers Dominate Size of Device
Bidirectional vs Directional Switch Block:Directional has Half as Many Switch Elements Switch Element:Same Quantity and Type of Circuit Elements(twice the wiring)
Building up Long WiresStart with One Switch Element Wire ends for straight connections.
Building up Long WiresConnect MUX Inputs Extend MUX inputs
Building up Long WiresConnect MUX Inputs TURN UP from wire-ends to mux
Building up Long WiresConnect MUX Inputs TURN DOWN from wire-ends to mux
Building up Long WiresAdd +2 More Wires (4 total) Add LONG WIRES, turning UP and DOWN.
Building up Long WiresAdd +2 More Wires (6 total) Add LONG WIRES, turning UP and DOWN
Building up Long WiresSingle Layout Tile !!! Add wire twisting
Long Wires! 1 2 3 NOTICE: One switch element holds 6 wires #Wires := WireLength x NumDirections = 3 x 2 = 6 No “partial” switch elements with fewer wires
Bigger Switch BlockTwo L3 Switch Elements NOTICE Switch element design forces quantization of channel width BidirectionalOne quantum = 1*L DirectionalOne quantum = 2*L
Summary • Directional wiring • Good • Potential area savings • Bad • Big input muxes, slower • Bigger quantum size (2*L) • Detailed-routing architecture is different(need new switch block) • Need to evaluate!
Bidirectional WiringOutputs are Tristates Fanout increasesdelay Multi-driver Wiring!!! Bidir Architecture
Directional WiringOutputs can be Tristates Fanout increasesdelay Multi-driver Wiring!!! Dir-Tri Architecture
Directional WiringOutputs can use switch block muxes New connectivityconstraint Single-driver Wiring!!! Dir Architecture
HSPICE DelaysIncludes Switch + Wire TSMC 0.18um
AREA * HSPICE Delay TSMC 0.18um
Summary • Single-driver wiring • Good • Same delay as tristate • No delay increases caused by fanout • Fewer wire loads: 27% lower capacitance • Bad • Directional only (by necessity) • Area-delay product “seems” worse, but isn’t
Results Summary • Average improvements usingsingle-driver wiring 0% channel width 9% delay 14% tile length of physical layout 25% transistor count 32% area-delay product 37% wiring capacitance
Conclusions • No more tristates! • Eliminates need for pass transistors • No “Vt” loss signal degradation • Better signal reliability, better drive strength • Significant savings in all metrics • Any reasons left to use bidirectional wiring ??? • Savings INCREASES with circuit size • Because interconnect dominates big circuits