1 / 26

Csci 136 Computer Architecture II – More on MIPS ISA

Explore the significance of Instruction Set Architecture (ISA) in computer hardware and software, focusing on MIPS architecture details and design principles.

sdrummond
Download Presentation

Csci 136 Computer Architecture II – More on MIPS ISA

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Csci 136 Computer Architecture II– More on MIPS ISA Xiuzhen Cheng cheng@gwu.edu

  2. Announcement • Project #1 is due on 11:59PM, Feb 13, 2005.

  3. What is an ISA? • A very important abstraction • Provide the interface between the low-level software and hardware • May have multiple hardware implementations • Needs to answer the following questions • What is the minimum instruction set to be supported? • Use general purpose register or not? • CIRS or RISC design? • Instruction format? • Addressing mode? • … …

  4. Summary: Salient features of MIPS • 32-bit fixed format inst (3 formats) • 32 32-bit GPR (R0 contains zero) and 32 FP registers (and HI LO) • 3-address, reg-reg arithmetic instr. • Single addressing mode for load/store: base+displacement • no indirection, scaled • 16-bit immediate plus LUI • Simple branch conditions • compare against zero or two registers for =, • no integer condition codes

  5. Summary: MIPS Instruction set design • Use general purpose registers with a load-store architecture: yes or no? • Provide 32 general purpose registers plus separate floating-point registers: • What’s the addressing mode supported by MIPS? • An ISA uses fixed instruction encoding if interested in performance and use variable instruction encoding if interested in code size. What does MIPS ISA do?

  6. Summary: MIPS Instruction set design • Support these data sizes and types: 8-bit, 16-bit, 32-bit integers and 32-bit and 64-bit IEEE 754 floating point numbers: • Support these simple instructions, since they will dominate the number of instructions executed: load, store, add, subtract, move register-register, and, shift, compare equal, compare not equal, branch, jump, call, and return: • Aim for a minimalist instruction set:

  7. More Details of MIPS ISA • Register 0 always has the value 0 even if you try to write it • Branch and jump use the PC+4 as the reference point • All instructions change all 32 bits of the destination register (including lui, lb, lh) and use all 32 bits of source register • Immediate arithmetic and logical instructions are extended as follows: • Logical immediate are zero-extended to 32 bits • Arithmetic immediate are sign-extended to 32 bits • The data loaded by the instructions lb and lh are extended as follows: • lbu, lhu are zero-extended • lb, lh are sign-extended • Overflow can occur in add, sub, addi, but does not in other arithmetic and logical operations

  8. MIPS Hardware Design Principles • Simplicity favors regularity • Keeping the hardware simple! • R-Type instruction format • Smaller is faster • 32 general purpose registers, no more, no less. • Good design demands good compromises • R, I, J, 3 types of instruction formats • Make the common case fast! • I-type instructions for constant numbers

  9. Symbolic Assembly Form <Label> <Mnemonic> <OperandExp> … <OperandExp> <Comment> Loop: slti $t0, $s1, 100 # if $s1<100 then $t0=1; else $t0=0 • Label: optional • Location reference of an instruction • Often starts in the 1st column and ends with “:” • Mnemonic: symbolic name for operations to be performed which directs assembler to • Arithmetic, data transfer, logic, branch, etc • OperandExp: value or address of an operand • Comments: Don’t forget me! 

  10. MIPS Assembly Language • Refer to the Companion CD. • Pseudo-instruction • Provided by assembler but not implemented by hardware • Disintegrated by assembler to one or more instructions • Example: blt $16, $17, Less slt $1, $16, $17 bne $1, $0, Less • Directives • Tells assembler how to interpret or where to put code; no machine code is generated. • Examples: str1: .ascii “I am a string” str2: .asciiz “I am a null-terminated string” .byte 8, 12, 16 .word 8, 12, 16 .space 12 # allocate 12 bytes in data segment .data # put the following in data segment .text # put the following in text segment .align 2 # put the following value on word boundary

  11. Compiler, Assembler, Linker, Loader • The compiler takes one or more source programs and converts them to an assembly program • The assembler takes an assembly program and converts it to machine code: an object file (or a library) • The linker takes multiple object files and libraries, decides memory layout and resolves references to convert them to a single program: an executable (or executable file) • The loader takes an executable, stores it in memory, initializes the segments and stacks, and jumps to the initial part of the program. The loader also calls exit once the program completes.

  12. MIPS Memory Layout (1/2) $sp  0x7FFFFFFF Stack segment … … … … … --Data segment— Dynamic data $gp  0x10008000 Static data 0x10000000 Text segment Instructions 0x00400000 Reserved MIPS Memory Layout Memory Organization

  13. MIPS Memory Layout (2/2) • How to load a word in the data segment at address 0x10010020 into register $s0? • lw/sw can not directly reference data objects with their 16-bit offset fields lui $t0 0x1001 lw $s0, 0x0020($t0) • Global pointer $gp points to 0x10008000lw $s0, 0x8020($gp)

  14. Assembler • Convert an assembly language instruction to a machine language instruction: fill fields of the machine instruction for the assembly language instruction • Compute space for data statements, and store data in binary representation • Put information for placing instructions in memory – see object file format • Example: j loop • Fill op code: 00 0010 • Fill address field corresponding to the local label (loop in this eg) • Questions: • How to find the address of a local or an external label?

  15. Local Label Address Resolution • Assembler reads the program twice • First Pass: If an instruction has a label, add an entry <label, memory address of the instruction> in the symbol table • Second Pass: if an instruction branches to a label, search for an entry with that label in the symbol table and resolve the label address • Produce machine code • External label can not be assembled! – need help from linker! • Assembler reads the program once • Produce machine code • If an instruction has a unresolved label, record the label and the instruction address in the backpatch table. After the label is defined, the assembler consults the backpatch table to correct all binary representation of the instructions with that label.

  16. Object File Format • Object file header • Size and position of each piece of the file • Text segment • Machine language instructions • Data segment • Binary representation of the data in the source file • Relocation information • Identifies instruction and data words that depend on the absolute addresses; In MIPS, only lw/sw and jal needs absolute address. • Symbol table • Global symbols defined in the file • External references in the file • Debugging information

  17. Example Object files

  18. Linker • Why needs a linker? • Save computing resources and time! • A linker converts all object files to an executable file • Resolve external symbols in all files • Use symbol table in all files • Search libraries for library functions • Assign address to data and instruction in all files • Place data and text segments of a file relative to other files • Determine size of text and data segments for the program

  19. Linking Object Files – An Example

  20. The 2nd Object File

  21. Solution

  22. Loader • A loader starts execution of a program • Determine the size of text and data through executable’s header • Allocate enough memory for text and data • Copy data and text into the allocated memory • Initialize registers • Stack pointer • Copy parameters to registers and stack • Branch to the 1st instruction in the program

  23. Instruction Fetch Instruction Decode Operand Fetch Execute Result Store Next Instruction Processor Fetch-Execute Cycle Obtain instruction from program storage Determine required actions and instruction size Locate and obtain operand data Compute result value or status Deposit results in storage for later use Determine successor instruction

  24. Example: Reverse a String (2/1) • Write a MIPS procedure to reverse a null-terminated character string. Assume the address of the string is in $a0 and the address of the reversed string is in $a1. Also assume the spaces needed by the reversed string have been pre-allocated.

  25. Example: Reverse a String (2/2) • Write a MIPS procedure to reverse a null-terminated character string. Assume the address of the string is in $a0 and the address of the reversed string is in $a1. Also assume the spaces needed by the reversed string have been pre-allocated. reverseStr: addiu $sp, $sp, -32 sw $s0, 16($sp) sw $s1, 20($sp) move $s0, $a0 move $s1, $a1 addi $sp, $sp, -1 sb $zero, 0($sp) push: lbu $t0, 0($s0) beq $t0, $zero, pop addi $s0, $s0, 1 addi $sp, $sp, -1 sb $t0, 0($sp) j push pop: lbu $t0, 0($sp) addi $sp, $sp, 1 sb $t0, 0($s1) beq $t0, $zero, done addi $s1, $s1, 1 j pop done: lw $s0, 16($sp) lw $s1, 20($sp) addi $sp, $sp, 32 jr $ra

  26. Questions?

More Related