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Chapter 5 The processor: Datapath and Control Multicycle Design

Chapter 5 The processor: Datapath and Control Multicycle Design. Q5.13.

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ALU (Continued)

ALU (Continued). Computer Architecture (Fall 2006). ALU Notation. An ALU is denoted using the following graphical notation. Operand1 ( A ). Operand2 ( B ). 8. 8. Indicates number of bits on each line. ALU. 9. 4. Result. Operation. Selecting 2 Registers.

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Instruction Memory

Instruction Fetch. Instruction Memory. Address. 4. Instr. [31-0]. PC. Fig 4.6 p 309. Write. Data Memory. Address. Write data. Data. Read. Registers and ALU. Instr [25-21 ] ( rs ). Instr [20-16 ] ( rt ). Registers. Read r eg 1. Read d ata 1. Instr [15-11 ] ( rd ). Read

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Instruction memory address - PowerPoint PPT Presentation

Chapter 5 The processor: Datapath and Control Multicycle Design

ALU (Continued)

Instruction Memory