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Sram sensing - PowerPoint PPT Presentation

Low Power designs in Memories

Low Power designs in Memories. Dr Elwin Chandra Monie. 4T & 6T SRAM cell Implementation. 4T Bistable Latch. __ BIT/BIT : Data line WORD : RD/WT. 6T Bistable Latch. Reading a Cell. I cell. D V = I cell * t ----- C b. Sense Amplifier. 1 -> 0. 0 -> 1. Writing a Cell.

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Sram sensing - PowerPoint PPT Presentation

Low Power designs in Memories