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CTGF Clock and Trigger Generator and Fan-out for Scalable Readout System

CTGF Clock and Trigger Generator and Fan-out for Scalable Readout System. 8-port RJ45 connector for Clock and Trigger distribution to FECs (LVDS). Slide switch to select Internal/External 40 MHz clock source. External 40 MHz clock Input (LVDS). External Trigger Input (NIM & TTL).

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CTGF Clock and Trigger Generator and Fan-out for Scalable Readout System

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  1. CTGFClock and Trigger Generator and Fan-outfor Scalable Readout System 9th RD51 Collaboration Meeting

  2. 9th RD51 Collaboration Meeting

  3. 9th RD51 Collaboration Meeting

  4. 8-port RJ45 connector for Clock and Trigger distribution to FECs (LVDS) Slide switch to select Internal/External 40 MHz clock source External 40 MHz clock Input (LVDS) External Trigger Input (NIM & TTL) 3 position Toggle switch to select External/Internal/Single Trigger NIM Trigger fan-out Power input (+5, -12) 9th RD51 Collaboration Meeting

  5. LVDS splitter 40 MHz INT 8-port RJ45 connector 8 LVDS pairs Clock EXT 10 Hz LVDS splitter TTL INT EXT 30-300 nS 8 LVDS pairs TRG SGL NIM NIM splitter NIM outputs 9th RD51 Collaboration Meeting

  6. NIM input NIM output ~15 nS LVDS output ~40 nS 9th RD51 Collaboration Meeting

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