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CSE140: System Design

This document outlines the necessary steps for implementing the data and control subsystems, including identifying inputs and outputs, condition bits, and data operations. It also explains how to map operations to implementable functions and design the control subsystem using FSM.

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CSE140: System Design

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  1. CSE140: SystemDesign Xinyuan Wang 05/31/2019

  2. Example:SP18Final

  3. Framework n=128 n=64 Data Subsystem Data Inputs Data Outputs Control Signals Conditions Control Subsystem Control Outputs Control Inputs Start/Request Done/Acknowledgement

  4. Handshaking module S X n=128 n=64 Data Inputs Data Outputs Master that calls module S Z Data Subsystem Y Control Signals done X Conditions Y Control Outputs Control Inputs Z Control Subsystem start Done/Acknowledgement Start/Request done start

  5. Beforeimplementingthedataandcontrolsubsystems Withthegivendescriptionofsystem • Identify Input and Output of data and control subsystems • Identify Condition Bits to Control Subsystem • Identify Data Subsystem Operations • Map Data Operations to Implementable functions n=128 n=64 Data Inputs Data Outputs Data Subsystem Control Signals Conditions Control Outputs Control Inputs Control Subsystem Done/Acknowledgement Start/Request

  6. Beforeimplementingthedataandcontrolsubsystems Withthegivendescriptionofsystem • Identify Input and Output of data and control subsystems 8 X Data Subsystem 8 8 W Y ? start Control Subsystem done 8 Z A[7],C[7]

  7. Beforeimplementingthedataandcontrolsubsystems Withthegivendescriptionofsystem • Identify Input and Output of data and control subsystems • Identify Condition Bits to Control Subsystem 8 X Data Subsystem 8 8 W Y ? start Control Subsystem done 8 Z A[7],C[7]

  8. Beforeimplementingthedataandcontrolsubsystems Withthegivendescriptionofsystem • Identify Input and Output of data and control subsystems • Identify Condition Bits to Control Subsystem • Identify Data Subsystem Operations 8 X Data Subsystem 8 8 W Y ? start Control Subsystem done 8 Z A[7],C[7]

  9. Beforeimplementingthedataandcontrolsubsystems Withthegivendescriptionofsystem • Identify Input and Output of data and control subsystems • Identify Condition Bits to Control Subsystem • Identify Data Subsystem Operations • Map Data Operations to Implementable functions

  10. Implementthedatasubsystem • List data operations • Map operations to functional blocks • Add interconnect for data transport • Input control signals and output conditions

  11. Implementthedatasubsystem D • List data operations • Map operations to functional blocks:registers LD C Registers: If C then R  D R RegisterA X A RegisterB RegisterC B Y Z C

  12. Implementthedatasubsystem • List data operations • Map operations to functional blocks:adders • Add interconnect for data transport

  13. Implementthedatasubsystem • List data operations • Map operations to functional blocks:muxformultiplesources • Add interconnect for data transport

  14. Implementthedatasubsystem • List data operations • Map operations to functional blocks • Add interconnect for data transport • Input control signals and output conditions

  15. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents • ExpressthecontrolsubsystemwithFSM • Implementthecontrolsubsystem

  16. Implementthecontrolsubsystem • Mapcontrolsignalstooperations control C0=0,L0=1andL1=0 C1=0 and L2=1 L3 =1andL4=0 C1=1and L2 =1 C0=1,L0=1andL1 =0 L3 =0andL4=1 L0=0andL1=1

  17. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents 8 X Data Subsystem 8 8 W Y 8 Z C0:1,L0:4 A[7],C[7] start Control Subsystem done Control Unit A[7] C0:1 C[7] done L0:4 start

  18. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents control C0=0,L0=1andL1=0 C1=0 and L2=1 L3 =1andL4=0 C1=1and L2 =1 C0=1,L0=1andL1 =0 L3 =0andL4=1 L0=0andL1=1

  19. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents • ExpressthecontrolsubsystemwithFSM L0:4 Control Unit A[7] C0:1 C[7] done start

  20. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents • ExpressthecontrolsubsystemwithFSM • Implementthecontrolsubsystem Howtoimplementthestateassignment?

  21. State Assignment One Hot Encoding: n bits for n states. Bit i=1 for state i.

  22. Control Subsystem: One-Hot State Machine Design Input: State Diagram • Use a flip flop to replace each state. Set the flip flop which corresponds to the initial state and reset the rest flip flops. • Use an OR gate to collect all inward edges. • Use a Demux to distribute the outward edges.

  23. Implementthecontrolsubsystem • Mapcontrolsignalstooperations • Identifycontrolpathcomponents • ExpressthecontrolsubsystemwithFSM • Implementthecontrolsubsystem

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