1 / 3

Header Definitions

Access to DSP GPIO Pins (General Purpose I/O). Header Definitions. Access to DSP Address bus and control bus. Access to DSP Data bus and ground pins. Header Definitions (continued). CPLD JTAG for programming an Altera EPM3064ALC44-10 CPLD if populated.

shanon
Download Presentation

Header Definitions

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Access to DSP GPIO Pins (General Purpose I/O) Header Definitions Access to DSP Address bus and controlbus Access to DSP Data bus and ground pins

  2. Header Definitions (continued) CPLD JTAG for programmingan Altera EPM3064ALC44-10CPLD if populated Access to DSP Analog to Digital Converter (ADC) Access to CPLD pins (actual EPM3064ALC44 pin number)

  3. Jumper Definitions This position used when powering using Ext Pwr (+5V) Header This position used when powering from XDS-100 USB This position used when powering from DSP UART USB Jumpersbetween DSP signals and hardwired CPLD pins

More Related