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Power Dissipation. • Dynamic Power Consumption. Charging and Discharging Capacitors. • Short Circuit Currents. Short Circuit Path between Supply Rails during Switching. • Leakage. Leaking diodes and transistors. Where Does Power Go in CMOS?. Vdd. Vin. Vout. C. L.
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• Dynamic Power Consumption Charging and Discharging Capacitors • Short Circuit Currents Short Circuit Path between Supply Rails during Switching • Leakage Leaking diodes and transistors Where Does Power Go in CMOS?
Vdd Vin Vout C L Dynamic Power Dissipation
Vdd Vin Vout C L Dynamic Power Dissipation 2 Energy/transition = C * V L dd 2 Power = Energy/transition * f = C * V * f L dd Not a function of transistor sizes! Need to reduce C , V , and f to reduce power. L dd Dependence with supply voltage is quadratic !!!
Short Circuit Currents I peak is a function of transistor sizes. It is also a strong function of the input and output slopes …
Short Circuit Currents • If the output is too slow, then the P transistor is off and there’s no direct current Vdd Vin Vout C L
Short Circuit Current • If the output is too fast, then the P transistor goes quickly to saturation (Vds = Vcc) and power consumption is maximum Vdd Vin Vout C L
Short Circuit Current • Graph of direct current versus output capacitance
Leakage Sub-threshold current one of most compelling issues in low-energy circuit design!
Reverse-Biased Diode Leakage JS = 10-100 pA/mm2 at 25 deg C for 0.25mm CMOS JS doubles for every 9 deg C!
Static Power Consumption Wasted energy … Should be avoided in almost all cases, but could help reducing energy in others (e.g. sense amps)
Principles for Power Reduction • Prime choice: Reduce voltage! • Recent years have seen an acceleration in supply voltage reduction • Design at very low voltages still open question (0.6 … 0.9 V by 2010!) • Reduce switching activity • Reduce physical capacitance