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IPSI Overview 2011: Research + Teaching. An Overview of IPSI Belgrade Projects for High-Tech Computer Industry in the USA and EU. IPSI Belgrade. IPSI Belgrade - Jointly founded by German/USA/Serbian capital
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IPSI Overview 2011: Research + Teaching An Overview of IPSI Belgrade Projects for High-Tech Computer Industry in the USA and EU
IPSI Belgrade • IPSI Belgrade - Jointly founded by German/USA/Serbian capital • Some of the the major past and present partners: - University of Ulm, Germany - Fraunhofer IPSI, Darmstadt, Germany - University of Birmingham, UK - Maxeler, FinSoft, GTech, IFACT, UK - NYU, School of Continuous Professional Studies, USA - HP, MS, DowJones, WallStreetJournal, USA
Employees and Associates • CEOProf. Dr. VeljkoMilutinovic, Fellow of the IEEE • Senior ConsultantsProf. Dr. Erich Neuhold, Fellow of the IEEE Prof. Dr. HiroFujii, Fellow of the IEEE Dr. HovardMoskowitz, Fellow of SigmaXi • Chief OfficersZoranBabovic, GoranRakocevic, AleksandarPrijic, NenadKorolija, etc.
The IPSI Belgrade Coverage • Workspaces of the Future- Environments for Cooperative Working and Learning- Virtual Information and Knowledge Environments- Mobile Interactive Media- Open Adaptive Information Management Systems- Publication Engineering and Technology- Networks and WWW- Infrastructure for E-Business on the Internet- Hardware Design and Operating Systems- Novel Computer Architectures
General Project Structure • Industrial Research: • Phase #1: Survey, and Generation of Embryonic Ideas • Phase #2: Analytic Analysis and Comparison (1+K) • Phase #3: Simulation Analysis and Comparison • Phase #4: Implementation Analysis and Comparison
General Project Structure • Industrial Development: • Phase #1: Product Requirements and Testing • Phase #2: Intra Module Coding and Testing • Phase #3: Inter Module Integration and Testing • Phase #4: Exhaustive Verification and Testing
Some Recent Educ Projects • Frankfurt/M, Frankfurt/O, Magdeburg, Berlin, Hagen, Koblenz, Kaiserslautern, Erlangen, TUM, IPSI FhG, Karlsruhe, Ulm, ... • NYU, Purdue, Dartmouth, Hawaii, … • Modena, Ferrara, Siena, Pisa, Salerno, Napoli, … • Tech De Monterrey, Tech De Durango, UNAM, La Salle, … • St. Mary’s, Dalhousie, … • RIT, Skoevde, Karlskrona, Karlstadt, … • Valencia, Madrid, Oviedo, Ciudad Real, …
Some RecentR&D Projects • NCR, Encore/Compaq/HP, SUN, Intel, … • Comshare, Zycad, QSI, Virtual, … • TechnologyConnect, BioPop, eT, MainStreetNetworks, … • DowJones, WallStreetJournal, … • Maxeler, FinSoft, … • Ericsson, STC, … • Ulm, Darmstadt, … • Salerno, Pisa, Siena, L’Aquila, ...
R&D Methodology • Introduction • Problem Statement • Criticism of Existing Solutions • Proposed Solution • Conditions and Assumptions • Details (1+k) • Mathematical Analysis • Simulation Analysis • Implementation Analysis • Conclusion
NCR: NextGen PC for E-Business • Cache coherence maintenance: Hardware approach • Cache coherence maintenance: Software approach • Accelerator chip for windowing • Accelerator board for dbase applications • Prefetching on the "silence" for disk cacheing • Accelerator chip for text compression • Accelerator chip for JPEG/MPEG
SMP in Action M P
ENCORE/COMPAQ/HP • Improved RMS for PC, and its prototype • The RM/MC for PC approach, and its analysis • Simulation of selected DSM approaches, and their comparison (RMS, KSR, and SCI) • Search for the optimal RMS inteconnect technology
Cutting the Edge • TopDown Technologies • i860 • Selected current microprocessor models • QSI • An ATM router chip with intelligence • In-memory processing with intelligence
N.B. ERRORS MADE & LESSONS LEARNED
The Split Temporal/Spatial Cache • Veljko Milutinović, Boris Marković*, Milo Tomašević, Aleksandar Milenković, and MarkTremblay** • IFACT • Department of Computer EngineeringSchool of Electrical EngineeringUniversity of BelgradePOB 35-5411120 Beograde, Serbia • ___________________________________________________________________________ * Boris Marković is with the University of Montenegro, Podgorica, Montenegro ** Mark Tremblay is with the SUN Microsystems, Palo Alto, California, USA
MM RUN.time • C2.temp • COMPILE.time C1.spat • C1.temp PFB SPLIT TEMPORAL/SPATIAL CACHE
The Injection Cache Veljko Milutinović, Aleksandar Milenković, Davor Magdić, and Gad Sheaffer* IFACTDepartment of Computer Engineering School of Electrical Engineering University of Belgrade POB 35-5411120 Beograde, Serbia ________________________________________________________________________ * Gad Sheaffer is with the Intel Corporation, Beverton, Oregon, USA
PRODUCER IN CONSUMER EARLY LATE C2 t t C1 c P CACHE INJECTION
VLSI Detection for Internet/Telephony Interfaces Goran Davidović, Miljan Vuletić, Veljko Milutinović, Tom Chen, and Tom Brunett * eT
USERS... . . . Superposition/DETECTION Superposition/DETECTION SPECIALIZED INTERNET REMOTE SITE SERVICE PROVIDER HOME/OFFICE/FACTORY AUTOMATION ON THE INTERNET
Reconfigurable FPGA for EBI Božidar Radunović, Predrag Knežević, Veljko Milutinović, Steve Casselman, and John Schewel* * Virtual
USERS . . . SPECIALIZED INTERNET SERVICE PROVIDER VCC VCC CUSTOMER SATISFACTION vs CUSTOMER PROFILE
Browser Acceleration Gvozden Marinković, Dragan Jandrić, Vladimir Ivanović, Veljko Milutinović, and Tom Chen *MainStreetNetworks
BioPoP Veljko Milutinovic, Vladimir Jovicic, Milan Simic, Bratislav Milic, Milan Savic, Veljko Jovanovic, Stevo Ilic, Djordje Veljkovic, Stojan Omorac, Nebojsa Uskokovic, and Fred Darnell • isItWorking.com
Testing the Infrastructure for EBI • Phones • Faxes • Email • Web links • Servers • Routers • Software • Statistics • Correlation • Innovation
CNUCEIntegration and Dataminingon Ad-Hoc Networks and the Internet Veljko Milutinović, Luca Simoncini, and Enrico Gregory *University of Pisa, Santanna, CNUCE
GSM Internet DM Ad-Hoc Ad-Hoc
Genetic Search with Spatial/Temporal Mutations Jelena Mirković, Dragana Cvetković, and Veljko Milutinović *Comshare
Drawbacks of INDEX-BASED: Time to index + rankingAdvantages of LINKS-BASED: Mission critical applications + customer tuned ranking Well organized markets: Best first search If elements of disorder: G w DB mutations Chaotic markets:G w S/T mutations Provider
University of UlmReverse Engineering of GeForce2-4 Sasa Jandric, Zaharije Radivojevic, Milos Cvetanovic, and Veljko Milutinovic
010101000001101101 • Developing system control programs (drivers) for GeForce 2-4, for the Plurix operating system • Main advantage of the GeForce chip (called graphical processor) is the use of 3D accelerating functions • Reversed engineering is used as a technology for finding previous information on the GeForce chip
Summary The world’s best journals - IEEE: Balkan record in ICT (50) Books with Nobel Laureates (7): Kenneth Wilson, Ohio (North-Holland) Leon Cooper, Brown (Prentice-Hall) Robert Richardson, Cornell (Kluwer-Academics) Jerome Friedman, MIT (IOS Press) Herb Simon (Kluwer-Academics) Harold Kroto (Academic Mind Press) Arno Penzias (Academic Mind Press)
Recent and On-Going Projects • StorageTek, Colorado, USA • Panthesis (exBoeing), Oregon, USA • Wall Street Journal, New York, USA • HP, Palo Alto, USA • STC, Uppsala, Sweden • Fraunhofer, Darmstadt, Germany • Finsoft, London, England • Maxeler, London, England
Publishing Tool Signer Stamp Tool Server Verification Body DSFS - Digital Sealed File System • Goal: System for Data Modification Detection • StampTool = Smart Card • Input: Hash • Output: Stamp + Public Key • Verification Body • Calculation of Hash Value • Comparison with Encrypted Stamp • PublishingTool • Public Key Distribution • Several Possible Solutions Depending on a Purpose StorageTek/A
Panthesis/A • E-Learning with SWAN
FinSoft/GTech • The art of testing in a fragile environment • Application tuned testing methodologies
Maxeler • Compilation into FPGA • Performance over the top supercomputers up to 240 times.
FP7 • WeGo • Balcon • ARTreat • ProSense
http://home.etf.rs/~vmhttp://www.ipsibelgrade.net/ e-mail: vm@etf.rs office@ipsibelgrade.net