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Lecture 4 Transistor as Switch Jan. 13 2003

Explore the structure of transistors, digital vs. analog applications, fabrication processes, and practical examples like inverters. Learn about Nobel laureates Shockley, Bardeen, & Brattain. Gain insights into transistor functionality and fabrication techniques worldwide.

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Lecture 4 Transistor as Switch Jan. 13 2003

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  1. Lecture 4 Transistor as Switch Jan. 13 2003

  2. Topics • Transistor structures. • Transistor as a switch

  3. Transistor structure n-type transistor:

  4. The Nobel Prize in Physics 1956 • William Bradford Shockley • Semiconductor Laboratory of Beckman Instruments, Inc. Mountain View, CA, USA • John Bardeen • University of Illinois Urbana, IL, USA • Walter Houser Brattain • Bell Telephone Laboratories Murray Hill, NJ, USA

  5. N Transistor

  6. P Transistor

  7. Transistor • Digital: switch • Analog: many characteristics • Example: inverter • P transistor + N transistor == one inverter

  8. Inverter + out a

  9. VDD tub ties transistors GND Inverter layout + (tubs not shown) out a a out

  10. Example 1 + out b a Write the truth Table of this circuit?

  11. VDD tub ties GND NAND layout + out out b a b a

  12. Example 2 + Write the truth Table of this circuit? b a out

  13. NOR gate + b a out

  14. VDD tub ties GND NOR layout b a b out out a

  15. Difference of digital and analog • Digital: switch • High level • Analog: characteristics of transistor • Low level

  16. Example 3 Transmission gate:

  17. Lecture 5 Transistor Fabrication Process Jan. 15 2003

  18. Topics • Transistor structure (switch) • Basic fabrication steps.

  19. Transistor structure n-type transistor:

  20. Fabrication services • Educational services: • U.S.: MOSIS • EC: EuroPractice • Taiwan: CIC • Japan: VDEC • Fab companies: mainly South Asia

  21. Fabrication processes • IC built on silicon substrate: • some structures diffused into substrate; • other structures built on top of substrate. • Substrate regions are doped with n-type and p-type impurities. (n+ = heavily doped) • Wires made of polycrystalline silicon (poly), multiple layers of aluminum (metal). • Silicon dioxide (SiO2) is insulator.

  22. transistor via Simple cross section SiO2 metal3 metal2 metal1 poly substrate n+ n+ p+ substrate

  23. What is • N and P • Substrate • Poly • Well (tub) • Metal • Via

  24. Photolithography Mask patterns are put on wafer using photo-sensitive material:

  25. Process steps First place tubs to provide properly-doped substrate for n-type, p-type transistors: p-tub p-tub substrate

  26. Process steps, cont’d. Pattern polysilicon before diffusion regions: gate oxide poly poly p-tub p-tub

  27. Process steps, cont’d Add diffusions, performing self-masking: poly poly p-tub n+ n+ p-tub p+ p+

  28. Process steps, cont’d Start adding metal layers: metal 1 metal 1 vias poly poly p-tub n+ n+ p-tub p+ p+

  29. Transistor structure n-type transistor:

  30. Question • How many layers? • Aluminum or copper? • Technology is P-MOS or N-MOS? • What is the purpose of silicon?

  31. A complete fabrication process

  32. Transistor structure (cont’d) n-type transistor:

  33. Questions (cont’d) • Order of Poly !!! • Self-aligned • What is the carrier for N-transistor and P-transistor? • Complete inverter ? • Need metals and vias

  34. 0.25 micron transistor (Bell Labs) gate oxide silicide source/drain poly

  35. Review • N transistor • P transistor

  36. Examples • Switch • Fabrication process

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