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LHCb Upgrade Electronics Status On behalf of the LHCb collaboration

LHCb Upgrade Electronics Status On behalf of the LHCb collaboration. Outline. Architecture review(s) Overview of sub-detectors Overview of common electronics Conclusions. Upgrade Architecture. Current. Readout Supervisor. L0 Hardware Trigger. HLT. 1MHz event rate. Upgrade.

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LHCb Upgrade Electronics Status On behalf of the LHCb collaboration

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  1. LHCbUpgrade Electronics Status On behalf of the LHCb collaboration LHCC, 12th March 2013

  2. Outline • Architecture review(s) • Overview of sub-detectors • Overview of common electronics • Conclusions LHCC, 12th March 2013

  3. Upgrade Architecture Current Readout Supervisor L0 Hardware Trigger HLT 1MHz event rate Upgrade Readout Supervisor Low-level Trigger HLT++ 50 Tb/s 40MHz event rate Ken Wyllie, CERN 3 LHCC, 12th March 2013

  4. Architecture Review SOL40 TELL40 LHCC, 12th March 2013

  5. Review summary 1 • Agenda (5/12/12) + Review Report: • https://indico.cern.ch/conferenceDisplay.py?confId=212204 • Many thanks to our external reviewers: • Alex Kluge (NA62, ALICE) • Philippe Farthouat (ATLAS) • Jorgen Christiansen (PH-ESE) • Presentations on: • Front-end & Back-end • Timing & Fast Controls • Expt. Control System • DAQ-interface • Infrastructure LHCC, 12th March 2013

  6. Review summary 2 • Positive feedback from reviewers: ‘NO SHOWSTOPPERS’ • ------------------------------------------------------------------------------- • Specific points on: • Obsolescence • Buffering on TELL40 • TELL40 firmware organisation • Using Cu-links Tell40 <-> DAQ • Tight schedule of ASICs • ------------------------------------------------------------------------------- • Updated specifications note: LHCb-PUB-2011-011 • ‘old’ systems under review • buffering being implemented • firmware coordination started • workshop in April • links under study with CERN & contractors • manpower + stronger collaboration LHCC, 12th March 2013

  7. Sub-detector Architecture Reviews in 2013 • Review of architecture implementation proposed by each sub-detector • check feasibility • check all architecture features included • ideas from external reviewers • prepare solid ideas for TDR • Specific mandate to 2 external reviewers • Documentation prepared in advance by sub-detectors LHCC, 12th March 2013

  8. Sub-detectors: VeLo + Si trackers • VeLo: • Timepix3 submission imminent • Precursor toVelopix: • design to start immediately • SALT chip (UT, IT, VeLo-strips) • Front-end + ADC (6-bits): • prototypes submitted shaper 5pF – 45pF Q(t) thr time Discr. out clock 0ns 25 50 75 TOT Time of Arrival LHCC, 12th March 2013

  9. Sub-detectors: Trackers • Outer Tracker: • TDC in FPGA on • prototype module • Also test of: • DC-DC convertors • optical link • SciFi: • PACIFIC chip: design started. • Specific issues with signal shape ADC LHCC, 12th March 2013

  10. Sub-detectors: Particle-ID • RICH • Prototyping with existing or new chip (Maroc/Claro) connected to MaPMT • Muon • New proposal to re-build • ‘off-detector’ modules (obsolescence) • Calorimeter • New chip ICECAL: • Tested with prototype digital module LHCC, 12th March 2013

  11. Common Electronics Status 1 Common Electronics LHCC, 12th March 2013

  12. Common Electronics Status 2 • We rely HEAVILY on ‘White Paper’ projects (CERN-PH): • GBT chipset 15,000 pieces • Versatile Link 9,000 pieces • DC-DC power convertors few 1000 pieces • GBTX chip layout • Versatile link dual-transmitter • DC-DC convertor LHCC, 12th March 2013

  13. Common Electronics Status 3 • TELL40: Significant progress • AMC40 available soon for users • buffering to be implemented • ATCA40: 1st prototype under test • ATCA infrastructure • hardware investigation • software for control/monitoring • Firmware organisation • Workshop at CERN 9/10 April • ALLsub-detectors will be present • formatting • buffering etcetc LHCC, 12th March 2013

  14. Optical fibres • Proposal to transmit detector data directly to surface (TELL40s) • Technically feasible? • Tested 400m single fibre with VL • + Tell40-AMC: OK • High quality fibre: expensive……. • Try lower grade + 12-way ribbon • Financially feasible? • Discuss with companies: • Procurement • Installation • Testing LHCC, 12th March 2013

  15. Conclusion • Electronics architecture blessed by reviewers • Clear guidelines for sub-detector implementation • Already huge progress by sub-projects • 2013 is a crucial year: • Manpower must increase • Detector requirements must be clear to allow good electronics design • - critical items are ASIC designs LHCC, 12th March 2013

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