1 / 12

Acceleration Sensor SPI Emulator Thesis

This thesis project focuses on developing an acceleration sensor SPI emulator using a CPLD and microcontroller. It aims to provide simulation capabilities for the acceleration sensor and integration with TRW's Hardware-in-the-Loop system.

suzanna
Download Presentation

Acceleration Sensor SPI Emulator Thesis

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. UNIVERSITATEA “POLITEHNICA” DIN TIMIŞOARA FACULTATEA DE ELECTRONICĂ ŞI TELECOMUNICAŢII DEPARTAMENTUL DE ELECTRONICĂ APLICATĂ Acceleration Sensor SPI Emulator Thesis adviser: Associate Professor Ph.D. Eng. JIVEŢ Ioan Author: MIHĂILESCU Andrei-Bogdan TIMIŞOARA 2010

  2. Acknowledgement The present diploma project has been developed in the period 15th September 2009-30th June 2010 as a research project in collaboration with “Politehnica” University Timişoara, „eAustria” Research Institute Timişoara and “BeeSpeed Automatizări” Timişoara (as a subcontractor for TRW, CIAT department, from Koblenz, Germany).

  3. Presentation Overview • Why this project? • Architecture overview • Sensor • CPLD • Microcontroller • Big Picture • Questions

  4. Why this project? • Title explanation SPI (Serial Peripheral Interface) with 2. Target use

  5. Architecture overview

  6. Sensor VTI SCA2120-D07 Accelerometer:

  7. CPLD • Xilinx XC95288XL CPLD: • 6 ns. pin to pin login delay • System frequency up to 208 Mhz • Available in 144 pin TQFP package (easy soldering, even by hand) • Low power operation • 5V tolerant I/O pins accept 5V, 3.3 V and 2.5 V signals • In-system programmable • Local clock inversion with 3 global and 1 product-term clocks • Full IEEE Standard 1149.1 boundary scan (JTAG) • 6400 usable gates • 288 macrocells

  8. uC-CPLD SPI timing diagram MISO Data VSC CPLD MOSI uC Sync VSC_CLK CLK_C164 CSB MISO Sensor CPLD role • Operation: • -Step 1: ‘understand’ request from the VSC • -Step 2: see if data is available from the uC or information is to be parsed directly from the sensor • Step 3:send the data to the VSC.

  9. uC • uC Board: • TQM164C minimodule • uC Role: • ADC port information • CAN (Controller Area Network) • Hardware-in-the-Loop interface • Transmission of simulation values • To the CPLD (3-wire SPI)

  10. uC-CPLD SPI timing diagram X_axis Data A D C Input Y_axis Sync Z_axis Temperature CLK CAN uC Role ADC information processing: Acceleration: Voltage range is 0…3.3V. 0g value = 1.65 V Resolution: 0.59V/g Temperature: Voltage range is 0… 3.3V 23°C value= 1.65 V Resolution: 10mV/°C

  11. “Big picture” CPLD uC Sensor ADC interface

  12. Conclusion TRW Hardware-in-the-Loop System • Circuit capabilities: • Simulation capabilities of the acceleration sensor • Analogical input for simulation values thru ADC port; • Fault injection capabilities • CAN simulation values injection and debugging (in progress) • Integration with Hardware-in-the-Loop system for TRW

More Related