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Drexel Engineering Library Introduction to Engineering Design Research Tutorials

Drexel Engineering Library Introduction to Engineering Design Research Tutorials. Understanding Citations. Jay Bhatt Engineering Librarian. Deciphering Citations. Use the Library Catalog. Article Found!. Citing References. Plagiarism Tutorial Proper in-text use and citation

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Drexel Engineering Library Introduction to Engineering Design Research Tutorials

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  1. Drexel Engineering LibraryIntroduction to Engineering Design Research Tutorials Understanding Citations Jay Bhatt Engineering Librarian

  2. Deciphering Citations

  3. Use the Library Catalog

  4. Article Found!

  5. Citing References • Plagiarism Tutorial • Proper in-text use and citation • Proper bibliographic citation • IEEE • ASME • ASCE Plagiarism

  6. Citation Styles IEEE / ASME ASCE / Author - Date • In text: It was shown by Author [#] that the evidence leads to... • [1] J.K. Author, Name of Manual/ Handbook, x ed., Abbrev. Name of Co., City of Co., Abbrev. State, year, pp. xx-xx. • [2] J. K. Author, “Name of paper,” Abbrev. Title of Periodical, vol. x, no. x, pp. xxx-xxx, Abbrev. Month, year. • In text: One recent report (Author date) finds evidence that… • Author, J. K. (year). Name of Manual/ Handbook, x ed., Abbrev. Name of Co., City of Co., Abbrev. State, pp. xx-xx. • Author, J.K. (year). “Name of paper,” Abbrev. Title of Periodical, vol. x, no. x, pp. xxx-xxx.

  7. Create an individual account for yourself and group accounts for your design teams.

  8. References [1] H. Caner, H. S. Gecim and A. Z. Alkar, "Efficient embedded neural-network-based license plate recognition system," IEEE Transactions on Vehicular Technology, vol. 57, pp. 2675-2683, 2008. [2] Chang-hongHu, Q. Zhou and K. K. Shung, "Design and implementation of high frequency ultrasound pulsed-wave Doppler using FPGA," IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, vol. 55, pp. 2109-11, 2008. [3] K. Coffman, Real World FPGA Design with Verilog. Upper Saddle River, N.J.: Prentice Hall PTR, 2000, pp. 291. [4] G. Grossi and F. Pedersini, "FPGA implementation of a stochastic neural network for monotonic pseudo-Boolean optimization," Neural Networks, vol. 21, pp. 872-9, 08. 2008. [5] H. Grünbacher and R. Hartenstein, Field-Programmable Gate Arrays : Architecture and Tools for Rapid Prototyping : Second International Workshop on Field-Programmable Logic and Applications, Vienna, Austria, August 31-September 2, 1992 : Selected Papers. , vol. 705, Berlin ; New York: Springer-Verlag, 1993, pp. 217. [6] T. Huffmire, T. Sherwood, R. Kastner and T. Levin, "Enforcing memory policy specifications in reconfigurable hardware," Computers and Security, vol. 27, pp. 197-215, 2008.

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