190 likes | 542 Views
A FPGA-Based Architecture for In-Flight Synthetic Aperture Radar (SAR) Motion Compensation in Unmanned Aerial Vehicles. Fernando Ortiz EM Photonics, Inc. Newark, DE. Outline. Introduction & Motivation SAR Reconstruction Basics Motion Compensation The Hardware Platform
E N D
A FPGA-Based Architecture for In-Flight Synthetic Aperture Radar (SAR) Motion Compensation in Unmanned Aerial Vehicles Fernando Ortiz EM Photonics, Inc.Newark, DE
Outline • Introduction & Motivation • SAR Reconstruction Basics • Motion Compensation • The Hardware Platform • Architecture for Real-time SAR Motion Compensation • Conclusion and Future Work
SAR Concept • Radar waves used to visualize objects because of their ability to penetrate a range of materials • Resolution of image improves as aperture size increases • Unfortunately, increasing aperture size (antenna length) may simply be impractical (antenna lengths in kilometers) Goal: gain the advantages of a large aperture radar by using a smaller, traveling aperture
SAR Applications Target Detectionand Tracking Buried ObjectDetection Ocean FloorTopography Air TrafficControl Mining/Space Exploration MedicalImaging
Without Compensation With Compensation Motion Compensation • Problem: cannot guarantee perfect motion paths • Result: degraded images • Solution: motion compensation • Options for aerial platforms: • Massive onboard computers • Slower processing (secs per frame) • Ground processing Complexity of motion compensation is limiting factor in deploying SAR systems!
Motivation How does this impact in-flight systems? X Space-Based Airborne UAV • Disregard motion compensation (for stable orbits) • Ground processing practical • Simple motion compensation • Power/area available for calculations • Advanced motion compensation (erratic path, wind interaction) • Minimal power/area for processing UAVs require fast, low area/power motion compensation solvers Solution: reconfigurable platforms!
SAR Geometry z Goal Determine x,y,s for each target range • How? • Range Imaging • Cross Range Imaging yn y (cross-range domain) Imaged Region xn x Reflective targets
s1 s2 s3 s4 Yc s1p(t-2x1/c) s2p(t-2x2/c) s3p(t-2x3/c) s4p(t-2x4/c) x1 x2 x3 x4 p(t) Received signal s4 s1 s2 s3 x1 x2 x3 x4 SAR Basics: Range Imaging Combines Range and Reflectivity Matched Filter Desired information
y3 y2 y1 Xc Fourier Transform (t,u) (w,ku) Inverse Transform (kx,ky) (x,y) SAR Basics: Cross-Range Imaging • Use matched filtering (again) to determine cross-range information • Put these two together and you have a 2D imaging system Typical SAR problem Received Signal Output Image 2D Matched Filter FFTs are the bottleneck in traditional SAR
ReceivedSignal FFT SARFilter MCFilter IFFT ReconstructedImage MC SAR Processing Flow Motion Compensationis the NEW Bottleneck SAR Filter Motion Compensation Filter Reconfigurable platform permits massive parallelization and pipelining
Hardware Platform Custom, FPGA-based PCI Card Xilinx Virtex-II 8000 FPGA 36 Mb DDR SRAM PCI 64/66 Interface 16 GB DDR SDRAM PLX 9656 (External PCI Control)
Platform Success Platform used to develop accelerated solvers for electromagnetic simulations. Performance vs. Problem Size ) 35 35 Mnps 30 30 EM Photonics Celerity Platform 25 25 20 20 Millions of nodes/sec ( 15 15 PC cluster, 30 nodes 10 10 5 5 Single PC • Key Statistics • 9.5 GB/s Main Memory Bandwidth • 150+ Floating-Point Units @ 133 MHz 0 0 0 0 50 50 100 100 150 150 200 200 Nodes (Millions) Nodes (Millions)
Norm BRAM kx ky x y Norm U Round Out Norm REG yn xn xe LUT Cos qc ye LUT Sin qc SAR Motion Compensation Architecture
Resource Utilization Quantity LUTs Mults Total LUTs Mults FPADD 10 488 0 4880 0 FPMUL 10 189 3 1890 30 FPDIV 1 573 0 573 0 FPSQRT 3 573 0 1719 0 FPEXP 1 11128 8 11128 8 Total 20190 38 % of XC2V8000 21.67 26.39 Three parallel SAR MCUs are feasible within a single chip
SAR Motion Compensation requires significant computing power Demonstrated FPGA platform capable of in-flight SAR MC RC platforms ideal fit for UAV applications Comm. Bandwidth savings Airborne processing enables further applications (e.g. ATR) Low weight/power Hardware reusable for other tasks For the future: This solves only one piece FFTs Interface Form factor has to be converted Less memory No PCI Interface with the rest of the system Integrate cooling into the airframe Conclusion and Future Work