Algebra of Parameterised Graphs

1. Andrey Mokhov, Victor Khomenko Arseniy Alekseyev, Alex Yakovlev Algebra of Parameterised Graphs

2. Motivation • Design cost is the greatest threat to the semiconductors roadmap: • manufacturing takes weeks, with low uncertainty • design takes months or years, with high uncertainty • Designer has to explore a large design space, and thus comprehend a huge number of • system configurations • operational modes • behavioural scenarios • implementation choices • Infeasible to consider each individual mode, need to • exploit similarities between the individual modes • work with groups of modes rather than individual ones • manage the modes and groups of modes compositionally • transform/optimisespecs in a formaland natural way

3. Design productivity gap “Productivity gap” 10000py Annual manufacturing gain >40% 850py Annual productivity gain ~20%

4. Individual descriptions ? 13 lines 270 stations

5. Overlaid descriptions • Easier for comprehension and reasoning • Gives bigger picture of the system • Easier to modify than individual lines Orange Park ?

6. Design space exploration • 2-input adder • 3-input adder • 2-input multiplier • fast 2-input multiplier • dedicated DP3 unit DP3(x,y)=x1y1 + x2y2 + x3y3 Characteristics of components

7. Design space exploration 2 multipliers Balanced Fastest Least peak power Dedicated component

8. Operations on graphs: overlay G1+G2 + = + =

9. Operations on graphs: sequence G1G2  =  =

10. Operations on graphs: condition [x]G • [0]G= (empty graph) • [1]G=G • From arithmetic to algebra: use parameters [x]G

11. Operations on graphs: condition [x]G • [0]G= (empty graph) • [1]G=G • From arithmetic to algebra: use parameters [x]G

12. Operations on graphs: condition [x]G • [0]G= (empty graph) • [1]G=G • From arithmetic to algebra: use parameters [x]G [1] ? [x] [0]

13. Canonical form of PGs Proposition: Any PG can be rewritten in the following canonical form: where • V is a subset of singleton graphs that appear in the original PG • bv are canonical forms of Boolean expressions • buv are canonical forms of Boolean expressions, s.t. buv⇒ bubv

14. Algebra of PGs • We define the equivalence relation on PGs abstractly, using the following axioms: • + is commutative and associative •  is associative • is a left and right identity of  •  left- and right-distributes over + • Decomposition: p q  r = p q + p r + q r • Condition: [0]p = and [1]p = p Theorem: The set of axioms of PG-algebra is • sound • minimal • complete w.r.t. PGs

15. Useful equalities (proved from axioms) • is an identity of + • + is idempotent • Left/right absorption: • p + p q = p  q • q + p q = p q • Conditional : [x] =  • Conditional + and : • [x](p + q) = [x]p + [x]q • [x](p  q) = [x]p  [x]q • AND-condition: [x  y]p = [x][y]p • OR-condition: [x  y]p = [x]p + [y]p

16. Case study: phase encoder • Phase encoding: data is encoded by the order of arrival of signals on n wires: • Goal: synthesise matrix phase encoder • Inputs: dual-rail ports xij that specify the order of signals • Outputs: phase encoded data vi abdc n! scenarios

17. Case study: phase encoder • Overall specification: where Hij models behaviour of ith and jth output wires • If xij=1 and xji=0 then there is a causal dependency vi  vj • If xij=0 and xji=1 then there is a causal dependency vj  vi • If xij=xji=0 then neither vi nor vj can be produced yet; this is expressed by a circular wait condition between vi and vj • |H| and the resulting circuit are linear in the size of input!

18. Transitive Parameterised Graphs •  is often interpreted as causal dependency, so the graphs are transitive • Hence two graphs are considered equal iff their transitive closures are equal • Can express this by an additional axiom Closure: if q   then p  q + q  r = p  q + p  r + q  r • Often allows to simplify expressions by transitive reduction

19. Transitive parameterised graphs PG expression [x]((a + b)c + cd) + [x]((a + b)(d + e)) with the specialisations TPG expression (a + b)([x]cd + [x]e) with the specialisations

20. Canonical form of TPGs Proposition: Any TPG can be rewritten in the following canonical form: where • V is a subset of singleton graphs that appear in the original TPG • bv are canonical forms of Boolean expressions • buv are canonical forms of Boolean expressions, s.t. buv⇒ bubv • transitivity: for all u,v,w∈V, buv bvw⇒ buw

21. TPG axioms – minimal, sound, complete Theorem: The set of axioms of TPG-algebra is • sound • minimal • complete w.r.t. TPGs.

22. Case study: Processor microcontroller ?

23. Case study: Processor microcontroller • Instructions classes: • ALU Rn to Rn e.g. ADD A,B; MOV A,B • ALU #123 to Rn e.g. SUB A,#1; MOV B,#3 • ALU Rn to PC e.g. JMP A • ALU #123 to PC e.g. JMP #2012 • Memory access e.g. MOV A,[B]; MOV [B],A • Cond. ALU Rn to Rn e.g. if A<B then ADD A,B • Cond. ALU #123 to Rn e.g. if A<B then SUB A,#1 • Cond. ALU #123 to PC e.g. if A<B then JMP #2012

24. Case study: Processor microcontroller • ALU #123 to Rn e.g. SUB A,#1; MOV B,#3 • TPG algebra specification: PCIU IFU  (ALU + PCIU’)  IFU’ • The graph is considered up to transitivity

25. Case study: Processor microcontroller • Cond. ALU #123 to Rn e.g. if A<B then SUB A,#1 • If A < B holds: (ALU + PCIU)  IFU  (ALU’+ PCIU’)  IFU’ • If A < B does not hold: (ALU + PCIU) PCIU’ IFU’ • Composing the two scenarios, lt := (A<B): [lt]((ALU + PCIU)  IFU  (ALU’ + PCIU’)  IFU’)+ [lt]((ALU + PCIU) PCIU’  IFU’) = (ALU + PCIU)  [lt]IFU  (PCIU’ + [lt]ALU’) IFU’

26. Case study: Processor microcontroller • Cond. ALU #123 to Rn e.g. if A<B then SUB A,#1 (ALU + PCIU)  [lt]IFU  (PCIU’ + [lt]ALU’)  IFU’

27. Case study: Processor microcontroller

28. Case study: Processor microcontroller

29. Conclusions and future work • New formalisms: PG and TPG algebrae with sound, minimal and complete sets of axioms • Canonical forms • Can work with groups of scenarios and exploit the similarities between them • Can formally compose, manipulate and simplify the specifications using the rules of these algebrae • Applications in microelectronics, formal methods, computer architecture, modelling university courses Future work: • Tool implementation • Simplification by modular decomposition of graphs

30. Thank you!