Flight Software Veer Bawa UCB/SSL Space Sciences Laboratory University of California, Berkeley

1. Flight Software Veer Bawa UCB/SSL Space Sciences Laboratory University of California, Berkeley

2. Flight Software Agenda • AGENDA • Overview • Requirements • Design • Foreground Tasks • Background Timing • Modes & Enables • Actuators Development Plan Issues

3. Overview Flight Software is broken into 13 major modules: Executive (EXEC) – runs long-term tasks Background (BKG) – runs routine tasks regularly Housekeeping (HSK) – samples engineering values Load (LD) – loads/dumps memory, scans SRAM for errors Command (CMD) – decodes/distributes commands Telemetry (TM) – multiplex packets and control transmitter I/O (IO) – interface to board hardware Utilities (UTIL) – common utilities for all modules Power (PWR) – controls power supply to components Attitude Control System(ACS) – runs ACS calculations Solid State Manager(SSR) – interfaces with SD Card STEIN Control – STEIN interface MAG Control – MAG interface

4. Level 2 Requirements

5. Level 2 Requirements

6. Level 2 Requirements

7. BKG.A EXEC.A STEIN FPGA LD.A SRAM & EEPROM STEIN Elect HSK.A Analogs SPI Helium STEIN.A CMD.A STEIN Atten POWER Switches Cmds TM.A Torque Coils PWR.A COMM FPGA S-Band Tx Sun Sensors Timers ACS.A MAG FPGA MAG Elect MAG.A SDCARD SSR.A SPI SPI Simulink FSW MAJOR MODULES I II III IV Design

8. Tasks • Two kinds of tasks • Foreground tasks (called by EXEC module) • Run asynchronously in available time • No hard limit on execution time • Configurable by ground commands • ACS, SRAM scan, memory peek/poke… • Background tasks (called by BKG module) • Run at specific times • Must complete before next interrupt (~9700 instructions) • Performs tasks that must occur on time • Data flow management, MAG sampling, housekeeping ADC sampling…

9. Foreground Task Operation • Foreground tasks • Round-robin loop of standard tasks (e.g. attitude determination) • Will be frequently interrupted by background tasks, so should not rely on shared peripherals maintaining their state (may put off-chip I/O in a specialized background task) • Additional tasks can be added by commands from ground; stored in SRAM • Uploaded tasks have scheduling field – “run at time T” • Many commands can be uploaded as a burst

10. Background Timing • Timing Interrupt • 1024 Hz interrupt schedule • BKG module distributes CPU time per table • Full table repeated at 16 Hz • Table independent of mode • Each ISR checks the enable bits before running A few slots are left empty, to be used later as needed

11. Modes & Enables FSW Modes Safe – Minimal Power Configuration, Resets to Safe, all optional bits off ACS – only Flash, Torquer, and LV MAG on, Used to control attitude Science - SDCARD Allowed, STEIN, S-Band Allowed, Actuators Disabled Engineering – Everything enabled Enable Mask Table Used to Maintain Power Balance

12. Actuations • Actuators • MAG Boom • Released by .25 to .50 second pulse to unit • Actuator Enable must be commanded on • STEIN Attenuator • Moving In / Out Controlled by FSW using STEIN count rates • Damage to Attenuator if commanded to reverse direction too soon • FSW automatic lockout for 120 (commandable) seconds after actuation • UHF Antenna - Must be automatically deployed initially, using a countdown timer - Must ensure that reset during countdown does not affect time of deployment adversely (i.e. too early or not at all)

13. Development Plans • Development • Pumpkin Development Board + Laptop PC • MPLAB30 “C” Compiler, Simulator, Debuggers • Subversion (SVN) for storing source code and documents • Corresponding TRAC wiki to track changes and issues (e.g. bugs) • GSE Laptop running GSEOS • FSW Developed in phases: • CPU/Mother Board Only • CPU/Mother Board + [EPS, Batt, UHF, IIB] • CPU/Mother Board + [EPS, Batt, UHF, IIB] + [HVPS,STEIN, MAG] • Verification Matrix Provides Status of Requirements • Comprehensive Performance Test on Development Board • Load into Flight System • Joins CINEMA Test Flow and Quality reporting

14. Verification • FSW Verification • CINEMA_FSW_002_Requirements.xls tracks requirement flows Development status, test overview and procedure name Note: Sample Only

15. Issues Required resources for ACS unknown; is a background task needed? SD Card overhead unknown