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This paper presents a multi-objective refinement approach for mapping tables in telecom network applications. The study explores different mapping table implementations, including primitives and multi-layer structures, and proposes an automated method for fast and efficient exploration and optimization. The results demonstrate the impact of network and operation characteristics on the performance, area, and power consumption of the mapping tables.
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Multi-objective refinement of Mapping Tables in Telecom Network Applications Jürgen Lambrecht, Chantal Ykman-Couvreur, Armin van der Togt, Francky Catthoor The Protocol Processor Project (PRO3)Contract No IST-1999-11449
Outline • Introduction • Context • Example: network switch • Related Work • Our contribution • Design space and Method • Mapping table implementations: primitives • Primitives characteristics • Mapping table implementations: multi-layer • Exploration Method • System Level Cost Factors • Results • Multi Objective Exploration • Impact of network • Impact of operation characteristics • Future work and Conclusions
Context Design Technology for Integrated Information and Communication Systems Memory system: bottleneck Methodology: system level specification optimised embedded implementation Data type refinement Mapping tables Application domain: telecom network, database, multimedia, ...
ATM MUX ATM 2 1 Y port 1 MUX 2 5 x Port 2 2 5 Y 4 7 x Key1 ( VPI[8] ) Key3 ( port[8] ) { VPI, VCI, port } [32] Key2 ( VCI[16] ) 2 = 0000 0010 5 = 0000 0000 1 = 0000 0001 4 = 0000 0100 0000 0101 7 = 0000 0000 0000 0111 2 = 0000 0010 2 = 0000 0010 1 = 0000 0000 1 = 0000 0001 2 = 0000 0010 0000 0001 5 = 0000 0000 0000 0101 2 = 0000 0010 Example: network switch Table (with active connections) 16 284 MB
Related Work • Programming theory • STL • SETL • Embedded systems • imec - Wuytack et al. 1996 • Design space characterisation for mapping tables • Preliminary exploration and optimisation method • imec - Ykman et al. ISSS 1999 • Extended design space (key merging/splitting) • Improved cost function
Power Area Our contribution • Objective trade-off • With all relevant application characteristics • Automated fast exploration and optimisation • simulates the application • collects profiling info • runs the tool • pareto curves result • Goal: • optimised implementation • trade-off multiple objectives • taking all relevant system characteristics into account
Outline • Introduction • Context • Example: network switch • Related Work • Our contribution • Design space and Method • Mapping table implementations: primitives • Primitives characteristics • Mapping table implementations: multi-layer • Exploration Method • System Level Cost Factors • Results • Multi Objective Exploration • Impact of network • Impact of operation characteristics • Future work and Conclusions
data data data data key key key key data data data data Mapping table implementations: primitives Array (AR) data data data data Pointer Array (PA) Linked List (LL)
LL(7) Layer 1 key1 key1 key1 key1 PA(4) 2 4 Layer 2 AR(3) Layer 3 data data data data data data data Mapping table implementations: multi-layer
ATM 2 1 Y port 1 MUX 2 5 x Port 2 4 7 x 2 5 Y Key1 ( VPI[8] ) Key3 ( port[8] ) { VPI, VCI, port } [32] Key2 ( VCI[16] ) 2 = 0000 0010 5 = 0000 0000 1 = 0000 0001 4 = 0000 0100 0000 0101 7 = 0000 0000 0000 0111 2 = 0000 0010 2 = 0000 0010 1 = 0000 0000 1 = 0000 0001 2 = 0000 0010 0000 0001 5 = 0000 0000 0000 0101 2 = 0000 0010 Exploration method • Key ordering • Key hashing • Key concatenation • Key splitting
LL(7) key1 key1 key1 key1 AR(3) data data data data data data data Exploration method • Key ordering • Key hashing • Key concatenation • Key splitting • Assignment of primitives Layer 1 PA(4) 2 4 Layer 2 Layer 3 Cost vector calculation
PA(4) 2 4 data data data data data data data System Level Cost Factors • Application characteristics • Data: size, average number • Keys: size, average number, dependencies, frequency distributions • Operations: accesses and proportion AR(3) • Memory cost • Area: bits • Performance: accesses • Power: vendor model
Outline • Introduction • Context • Example: network switch • Related Work • Our contribution • Design space and Method • Mapping table implementations: primitives • Primitives characteristics • Mapping table implementations: multi-layer • Exploration Method • System Level Cost Factors • Results • Multi Objective Exploration • Impact of network • Impact of operation characteristics • Future work and Conclusions
Difference Factor 2 in size 5 in power 8 in accesses 2 in performance Multi Objective Exploration
Future work • Better memory library • Off-chip memory support • On/Off-chip partitioning • Include fixed platforms (w. caches…) • Further automation • New primitive data structures • Internet multimedia data sets • Trees
Conclusions • Bottleneck in embedded system synthesis: • memory performance, area, and power • our focus: Mapping Tables • Optimisation at system level • Automated method needed • Multi-objective exploration • All relevant application characteristics • Fast • Power-objective result • 90% area savings • 80% power savings • without decreasing the performance
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ADT Selected data structures VirtualMemorySegments Physical Memories Memory Management in Matisse Abstract Data TypeRefinement Dynamic Memory Mngnt. Virtual memory mngntRefinement Physical memory mngntRefinement Physical Memory Mngnt.
Exploration and Optimization Power 20,000 10,000 2,000 1,000 200 100 Layers 2 1 3 4