FPGA Routing Channel Width Estimation Based on Knowledge Based Neural Network Model

1. FPGA Routing Channel Width Estimation Based on Knowledge Based Neural Network Model 报告人：高明 导师：刘强

2. Contents 1、FPGA architecture 2、Model construction approach 3、Model quality and application 4、Future work

3. Island-Style FPGA Architecture

4. Detailed Routing Architecture

5. Average Channel Width Variation with K and N

6. Average Channel Width Variation with Fs and Fcin

7. Average Channel Width Variation with Fcout and L

8. Model Construction Approach • To estimate the channel width W, in fact, is to relate the parameters to the channel width as below: W=f(K, N, Fs, Fcin, Fcout, L, n2)

9. The Proposed KBNN Structure

10. The 3-layer MLP Neural Network The NNs are capable of a) learning behaviors of any systems, given system’s inputs and outputs; b) simulating those systems to quickly respond to inputs as a black box.

11. Model quality and application • Results show that the KBNN model has an average error 3.8% and improves the average error by 5.59% compared to the model [Fang and Rose 2008].

12. Model quality and application • Estimating the number of programming bits can lead to a first order approximation of device area, meaning that this study has an interesting significance.

13. Model quality and application

14. Model quality and application

15. Future Work In the future, we would like to extend the work in the following aspects: 1、relate the channel width to the high-level performance metrics, such as area and power consumption, in order to carry out system-level architecture exploration; 2、extend the model for heterogeneous FPGAs, which have the mixed values of the architecture parameters.

16. Thank you !