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Explore examples of neural network hardware use in particle physics, including the H1 Neural Network Trigger project. Discover the future of neural network hardware and its impact on physics research. Learn more about the architecture and recent physics results.
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Neural nets in hardware: A short Overview Examples of NN hardware use in particle physics H1‘sLevel 2 Neural Network Trigger Future of neural network hardware Conclusions The H1 Neural Network Trigger Project Christian Kiesling Max-Planck-Institut für Physik München, Germany Architecture and hardware Some recent physics results The next step: „intelligent“ pre-processing C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
The „classical“ hardware is a standard serial computer (PC) „Millisecond Scale“ Exploit this architecture by neuromorphic hardware: Neural algorithms are inherently parallel Fast realtime applications High complexity networks „Micro-second Scale“ Short Overview of Neural Network Hardware (in HEP) Many successful NN projects („offline-type“, „low“ complexity) Well-established methodology BUT: What about the „micro-second scale“ ? Who needs this? C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Blue color: chip no longer produced towards a complexity similarto the human brain ... Analog Devices: ETANN, 1991 (Electrically Trainable Artificial Neural Network by Intel) (64x64x4 in 5 s) NeuroClassifier, 1994(by P. Masa, Univ. Twente, NL) (70x6x1 in 20 ns) Digital Devices: CNAPS1993 (Adaptive Solutions, Oregon)64 @20 MHz 8/16 MA161994 (Siemens, Germany) 16 @50 MHz 16/16 TOTEM1994 (Pisa, Italy) 32 @30 MHz 16/ 8 SAND11995 (KfK, Germany) 4 @50 MHz 16/16 recent development: Maharadja,1999 (Paris, France) details at this conference (see talk of B. Granado, AI, Sess.I) back to analog (?) „Silicon Brain“ (Irvine Sensors Inc.)3D analog FPGA array C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Drift chamber scintillation counters Proton beam Muon track Beam dump Trigger-El. TVC signals ETANN board Readout motherboard (TVC‘s, ADC‘s) ETANN output Online computer 12 inputs 64 hidden 64 outputs Track parameters: slope and intercept 32 bits (slope) 32 bits (intercept) Early Applications in Particle Physics: Analog Chips First neural network trigger: beam test experiment at Fermilab Muon Trigger derivedfrom drift chamber dataC.S. Lindsay, B. Denby et. al,Nucl. Instrum. Meth. A317 (1992) 346 Analog chip ETANN used Another project at Fermilab:Electron identification in CDF,first test application in a HEP experimentB. Denby et al., Nucl. Instrum. Meth. A356 (1995) 485 C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
determine energy spectrum of electrons: Oscillation: distortion of energy spectrum: The Digital Era MA16: Beauty Trigger in the WA92 ExperimentW. Baldanza et al., in: New Computing Techniques in Physics Research, World Scientific, Singapore, 1994 CNAPS: CHOOZ Neutrino Oscillation ExperimentM. Appolonio et al., Phys. Lett. B240 (1998) 397 measures the flux from an 8.5 GWnuclear power reactor near Chooz (F) NN used for finding position and energyof observed electron at the trigger level. C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Mission: p 920 GeV e u 27.6 GeV Gluon d u The H1 Experiment at HERA • study • the structure of the nucleon • the fundamental interactions of quarks and gluons : • Quantum chromodynamics (QCD) • electroweak interference • search • for physics beyond the Standard Model Physics analysis : Measurements of the structure functions F2, FL, F3, F2D Jet Measurements (strong coupling constant) Charm/Beauty Production (gluon content of proton) Diffractive Vector Meson Production (gluon struct.) Search for Instanton Effects (QCD „exotics“) Hardware (MPI): Liquid Argon Calorimeter (forward barrel section) LAr front end electronicsLAr trigger (L1) Neural Network Trigger (L2) C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
hardware software Neural Network at Level 2:Global Event Decision The H1 Trigger Scheme L1 trigger:OR of individual subdetectortriggers, such as MWPC, CJC, LAr, SpaCal, system ... L2 systems:have access to informationfrom all subdetectors(information prepared bysubtrigger processors) C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
weights background physics Architecture of the H1 Neural Network Trigger Three-Layer Feed Forward Neural Net Output (only one neuron) One hidden layer Inputs (fromdetector) Central Problem:Inputs for the Neural Nets DataSelection discriminate„physics“ from „background“ : Data Transformation C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Calorimeter (LAr) hadronic electromagnetic Trigger towers, global energies (8 bit numbers) Trigger towersabove threshold(single bits) SpaCal (Pb scint.) µ chambers Hits (single bits) Nr. of tracks(8 bit numbers) 16 bin histogram(8bit numbers) “physics” (example of photoproduction) Central Jet chamber MWPC’s (2 sets) Hits (single bits) z-VRTX (from MWPC) “background” and there is much more physics in H1 ... Detector Informationat level 2 C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Network processors Loading and Control VME SUN / SBus Interface X11 Terminal CNAPS 10 CNAPS 11 CNAPS 7 CNAPS 8 CNAPS 9 CNAPS 3 CNAPS 6 CNAPS 1 CNAPS 5 CNAPS 2 CNAPS 4 CNAPS 0 Set of independentnetworks,each one trained for a specific physics reaction SBus Interface Monitoring DDB 10 DDB 11 DDB 8 DDB 9 DDB 0 DDB 1 DDB 2 DDB 3 DDB 4 DDB 5 DDB 6 DDB 7 Data selection andData transformation Data from Detector To Final Decider : Modular and Expandable The Neural Trigger System C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
The L2 Bus (8 subbusses, 16 bit wide) 0 1 2 3 4 5 6 7 Subdetector 1 Subdetector 2 Subdetector 3 t(BC) 0 2 4 6 8 ... TheData Distribution Board(preprocessing of neural input) Selection of input data to neural network Processing (look-up, summing) D D B I D D B I L2 crate backplane: L2 Bus data input units: Cables from subdetectors (maximum of 40) Organization and Processing of Data from L1 Subdetector information arrives in consecutive time slices ti(„frames“, orbunch crossings BC) (tmax = 32 BC’s at present) 1 BC = 96 ns = 10 MHz transfer rate C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
DDB I Preprocessingof input data: presently: 4 micro-secondsneeded to selectand transform the input data suited for a given network Custom design, built at MPI C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Special Chipwith 64 Processors CNAPSby Adaptive Solutions Neuromorphic Hardware on chip:4k memory for the weights Performance: 1.2 Giga MAC/sec (multiplication + accumulation) 3-layer network in 8 ms C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
CNAPS - Chip Out-Bus 8 PN1 PN2 PN63 PN0 Inter-PN 4 Output Bus PN-CMD 32 8 In-Bus Weight Address Weight Memory 4k Bytes Register File 32 x 16 2 8 to right Output Buffer Stride Stack 2 from right Base 12 16 12 16 16 16 8/16 16 8/16 16 16 16 16 to left 2 Shifter Multiplier Input Buffer Adder from left 2 Logic 32 16 32 4 8 24 PN Command Bus Input Bus The digital CNAPS 1064 chip by Adaptive Solutions, Oregon 0.8 micron technology, 11 million transistors 20.8 MHz , 64 MAC’s in 1 cycle + read in new datum (SIMD) 64 x 64 x 1 net in 8 µs (8 bit input, 16 bit weights, fixed point) Can be programmed to docalculations with higherprecision (at the cost ofprocessing time) C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
12 independent networks Pre-processing modules (one for eachneural network) Cables carrying rawinput data from the detector The complete System Total of 1024 processors Integrated computingpower: over 20 Giga MAC/sec C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Trigger rate Monitor (24h) (random day in early 1999) 1: 2: 4: 5: 6: 7: 8: 9: 10: 11: Backgroundrejection factor > 100 ! (Boxes 0 and 3 also active during 99/00) The Neural Network Trigger in Operation: C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
QCD xg expected large in QCD expected small in Regge theory Due to highly selective NN trigger background is under control up to the highest HERA energies Some Physics: Elastic Photoproduction of Mesons C. Adloff et al., Phys. Lett. B483 (2000)23 C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Recent results on d/dt: Measurement possible due to neural trigger (publication in preparation) Photoproduction of Mesons withProton Dissociation C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
So far no information from LAr trigger towers used, only global energy sums, no subdetector correlations (limitation was dictated by time schedule for the realization of the trigger) Need more Intelligent Preprocessing New Network Preprocessing - The DDB II Why a new preprocessor? Neural Network Trigger successfully in operation since Summer 1996, promising physics results, but: NOW: need to prepare for higher selectivity (luminosity upgrade: HERA 2000: factor 5 more physics @ constant logging rate) New Goal: separate “interesting” physics from “uninteresting”physics C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Quasi-reconstruction of physical objects(isolated particles, jets) Calorimeter Object („particle“) n-tuples (Eem , Ehad , Q, pT mask, muon tag ,...)total of 16 quantities per object MWPC + additional post processing, e.g. particle counters, angular differences etc. CJC scheduled to be ready for the HERA lumi upgrade (summer 2001) Muon System Design of the New Preprocessor General Idea: Clustering for feature extraction (energies, bit fields) + topological matching of information C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
1 1 1 LAr calor. 1 1 1 2 3 2 1 1 1 2 3 2 2 find isolated energy depositionscharacterized by shower structure(i.e. create vector of shower quant.) 2 --region 2 steps: precluster, then „LAr“ algo 1 parallel execution within 8 regions (as indicated), merging of clusters on boundaries Cluster Algorithm (for bit fields) 1. Cluster Algorithm (in Calorimeter) C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
put sorting mask (16 bits) onto objects: sort , e.g., according to LAr(em )or LAr(had) energies, MWPC index, Muon index, nr of tracks from CJC etc. 3 parallel sorting machines (3 of 16 possible) 2. Matching (physical objects) 3. Ordering („Energy“ Sorting) 4. Post-processing Count numbers of objects in theordered lists Matching algorithm Presented at this conference byJ.-C. Prevotet 5. Selection of Net Inputs inputs as n-vectors from physical objects depending on physics ... C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Backgr. Physics DDB I photo- production (DDB II simulated with DDB I) Backgr. Physics Gain about a factor of 2 in efficiency with the new DDB II algorithms for this case. Expect increased selectivity also for other physics ... „DDB II“ How does Physics profit from the DDB II ? Test reaction: photo-production C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
But: Clear demand in HEP for superfast realtime processing: Event rates for Collider experiments of the next generation (LHC) will be ferocious ~ 100 KHz after L1 (0.1 TByte/sec @ 1 MByte/ev) Hard to imagine that „simple“ trigger schemes will work (or that data volumes of 0.1 TByte/sec can be logged and analysed) L1 event decisions will become essential (few 100 ns scale !) Neuromorphic H/W Need the 0.1 Micro-second Scale University developments (Maharadja++ ?) The „Big Market“ will develop in robotics and intelligent automation Serial computation at a dead end ? Era of parallel processing ? The Future of Neuromorphic Hardware Hard to say .... C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000
Neural networks firmly established as a powerful computation modelin many fields of science (and also in the financial world!) Neuromorphic hardware, on the other hand suffered from strong increase in computing power on the PC sector („millisecond scale“) For many „human scale“ applications this is sufficient (OCR etc.) Physical realtime applications, however, need higher speed („micro-second scale“) Concrete example (among others): The H1 neural network trigger Future of NN H/W seems bright: Successfully running since 4 years, producing physics papers Now improving performance in preparation for high luminosity: „Intelligent“ pre-processing , using large-scale FPGA design Physics is driving the field .... Conclusions C. Kiesling, ACAT 2000 Workshop, Fermilab, Oct. 16-20, 2000