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EEE 4211 Microprocessor and I/O System. SAP-1. SAP-1 Timing Cycle for LDA Routine. SAP-1 control Signals. State Equations. Ep= T1 Cp= T2 Lm’= T1+ T4.LDA+T4.ADD+T4.SUB Ce’= T3+ T5.LDA+T5.ADD+T5.SUB Li’= T3 Ei’= T4.LDA+T4.ADD+T4.SUB La’= T5.LDA+T6.ADD+T6.SUB Ea= T4.OUT Su= T6.SUB
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State Equations • Ep= T1 • Cp= T2 • Lm’= T1+ T4.LDA+T4.ADD+T4.SUB • Ce’= T3+ T5.LDA+T5.ADD+T5.SUB • Li’= T3 • Ei’= T4.LDA+T4.ADD+T4.SUB • La’= T5.LDA+T6.ADD+T6.SUB • Ea= T4.OUT • Su= T6.SUB • Eu= T6.ADD • Lb’= T5.ADD+T5.SUB • Lo’= T4.OUT
Microprogramming • Reduces the complexity of control circuit. • In Microprogramming, microinstructions are stored in a ROM instead of producing them with hardwired control matrix.
Construction of Microinstruction for SAP-1 • For LDA, at t1, the states of control Signals are: Cp=0 Ep=1 Lm=1 Ce=0 Li=0 Ei=0 La=0 Ea=0 Su=0 Eu=0 Lb=0 Lo=0 • So the Controller has to generate the control word/ Microinstruction 0110 0000 0000 or 600h • In this way, microinstructions will be generated and stored in the control ROM.
Microprogrammed Controller circuit • I7 I6 I5 I4 Address ROM 16X4 T3 Presettable Counter Load CLOCK T1 CLR CLR Control ROM 12 bit
Implementation of HLT LDA Instruction Decoder 4-16 I7 I6 I5 i4 ADD SUB OUT HLT CLK Oscillator/ Clock Generator
What is the motivation behind Microprogramming? With complete block diagram briefly explain the controller/sequencer design using microprogramming technique. Control word of the controller/sequencer is given. • Specify SAP-1 Control ROM and Address ROM contents.