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I/O Hardware Device Controllers: Speed and Architecture

This article discusses the speed difference of I/O hardware device controllers and the various architectures used. It covers the components of I/O devices, memory-mapped I/O, PC's I/O architecture, memory-mapped I/O ports, specialized I/O ports, I/O interfaces, and I/O shared memory.

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I/O Hardware Device Controllers: Speed and Architecture

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  1. Input/OutputThe messiest part of O.S. Chap11

  2. Speed difference of I/O Hardware

  3. Device Controllers • I/O devices have components: • mechanical component • electronic component • The electronic component is the device controller • may be able to handle multiple devices • Controller's tasks • convert serial bit stream to block of bytes • perform error correction as necessary • make available to main memory

  4. Memory-Mapped I/O (1) • Separate I/O and memory space • Memory-mapped I/O • Hybrid

  5. Memory-Mapped I/O (2) (a) A single-bus architecture (b) A dual-bus memory architecture

  6. I/O Architecture • Several types of bus,such as ISA, EISA,PCI and MCA, are currently in use. • data bus – the pentium has 64 bit wide data bus • Address bus – • Control bus – a group of lines that transmit control information to the connected circuits. The Pentium uses control lines to specify, for example, whether the bus is used to allow data transfers between a processor and the RAM, or alternatively, between a processor and an I/O device.

  7. PC’s I/O architecture CPU I/O bus I/O Port I/O Port I/O Interface I/O Controller

  8. PC’s I/O architecture • When a bus connects to the CPU to an I/O device, it is called an I/O bus. • 80x86 use 16 out of the 32 address lines to address I/O devices and 8,16, or 32 out of the 64 data lines to transfer data

  9. I/O ports • Each device connected to the I/O bus has its own I/O address, which are usually called I/O ports • PC provides up to 65536 8-bits I/O ports. Two consecutive 8-bit ports may be regarded as a single 16-bit port. • Four assembly instructions in,ins,out,outs allow CPU to read and write into an I/O port

  10. Memory mapped I/O ports in PC • PC’s device I/O ports may also be mapped into address of physical address space. • O.S. can use mov instruction that operate directly on memory. • Modern hardware devices are more suited to mapped I/O, since it is faster and can be combined with DMA

  11. I/O and registers • The I/O ports of each device are actually structured into a set of specialized registers • CPU write commands to control registers • CPU reads a value that represents the internal state of the device from status register • CPU fetch data from a device by reading input register • CPU push data to device by writing bytes into output registers

  12. Specialized I/O ports Control register Device’s I/O Interface CPU Status register input register Output register

  13. To lower costs, the same I/O port is often used for different purposes. e.g., some bits describe the device state and others are used to specifycommands.e.g., the same I/O ports may be used as an input register or an output register

  14. What is an I/O interface? • An I/O interface is a hardware circuit inserted between a group of I/O ports and the corresponding device controller. • It acts as an interpreter that translates the values in the I/O ports into commands and data for the device.

  15. Types of I/O interfaces • Custom I/O interfaces • devoted to one specific hardware device • usually, the device controller is on the same card of I/O interfaces. • General-purpose I/O interface • used to connect several different hardware devices

  16. Custom I/O interfaces • Keyboard interface • Graphic interface • Disk interface • Network interface

  17. General –purpose I/O interface • Parallel port • traditionally connected to printers, but can also be connected to removable disks, scanners • Serial port • one bit at a time • use UART chip (Universal Asynchronous Receiver and Transmitter) to string out the bytes into a sequence of bits. • Universal serial bus (USB) • PCMCIA interface • SCSI (Small Computer System Interface) Interface

  18. Device Controller • It interprets the high-level commands received from the I/O interface and force the device to execute specific actions by sending proper sequence of electrical signals • It converts and properly interprets the electrical signals received from the device and modifies (through the I/O interface) the value of the status register

  19. I/O shared memory • Several hardware device sometimes include their own memory, which is often called I/O shared memory. E.g. graphic cards.

  20. PC’s mapping addressesof I/O shared memory • For device connected to ISA bus • mapped into physical address from0xa0000 to 0xfffff: a hole between 640K-1MB. These are reserved page frames • For some old devices using VESA Local bus • 0xe00000 to 0xffffff : 14MB-16MB • going out of production • For device connected to PCI bus • is mapped into very large physical address, well above the end of RAM’s physical address. Much simpler to handle • AGP (Accelerated Graphics Port) • use a special hardware circuit GART (Graphics Address Remapping Table) • GART enables AGP to sustain much higher data transfer rate.

  21. Direct Memory Access (DMA) Operation of a DMA transfer

  22. Interrupts Revisited How interrupts happens. Connections between devices and interrupt controller actually use interrupt lines on the bus rather than dedicated wires

  23. Principles of I/O SoftwareGoals of I/O Software (1) • Device independence • programs can access any I/O device • without specifying device in advance • (floppy, hard drive, or CD-ROM) • Uniform naming • name of a file or device a string or an integer • not depending on which machine • Error handling • handle as close to the hardware as possible

  24. Goals of I/O Software (2) • Synchronous vs. asynchronous transfers • blocked transfers vs. interrupt-driven • Buffering • data coming off a device cannot be stored in final destination • Sharable vs. dedicated devices • disks are sharable • tape drives would not be

  25. Programmed I/O (1) Steps in printing a string

  26. Programmed I/O (2) Writing a string to the printer using programmed I/O

  27. Interrupt-Driven I/O • Writing a string to the printer using interrupt-driven I/O • Code executed when print system call is made • Interrupt service procedure

  28. I/O Using DMA • Printing a string using DMA • code executed when the print system call is made • interrupt service procedure

  29. I/O Software Layers Layers of the I/O Software System

  30. Interrupt Handlers (1) • Interrupt handlers are best hidden • have driver starting an I/O operation block until interrupt notifies of completion • Interrupt procedure does its task • then unblocks driver that started it • Steps must be performed in software after interrupt completed • Save regs not already saved by interrupt hardware • Set up context for interrupt service procedure

  31. Interrupt Handlers (2) • Set up stack for interrupt service procedure • Ack interrupt controller, reenable interrupts • Copy registers from where saved • Run service procedure • Set up MMU context for process to run next • Load new process' registers • Start running the new process

  32. Device Drivers • Logical position of device drivers is shown here • Communications between drivers and device controllers goes over the bus

  33. Device-Independent I/O Software (1) Functions of the device-independent I/O software

  34. Device-Independent I/O Software (2) (a) Without a standard driver interface (b) With a standard driver interface

  35. Device-Independent I/O Software (3) (a) Unbuffered input (b) Buffering in user space (c) Buffering in the kernel followed by copying to user space (d) Double buffering in the kernel

  36. Device-Independent I/O Software (4) Networking may involve many copies

  37. User-Space I/O Software Layers of the I/O system and the main functions of each layer

  38. UNIX I/O (1)/Device Driver Some of the fields of a typical cdevsw table

  39. UNIX I/O (2) The UNIX I/O system in BSD

  40. Streams An example of streams in System V

  41. Disk Hardware (1) Disk parameters for the original IBM PC floppy disk and a Western Digital WD 18300 hard disk

  42. Disk Hardware (2) • Physical geometry of a disk with two zones • A possible virtual geometry for this disk

  43. Disk Hardware (3) • Raid levels 0 through 2 • Backup and parity drives are shaded

  44. Disk Hardware (4) • Raid levels 3 through 5 • Backup and parity drives are shaded

  45. Disk Hardware (5) Recording structure of a CD or CD-ROM

  46. Disk Hardware (6) Logical data layout on a CD-ROM

  47. Disk Hardware (7) • Cross section of a CD-R disk and laser • not to scale • Silver CD-ROM has similar structure • without dye layer • with pitted aluminum layer instead of gold

  48. Disk Hardware (8) A double sided, dual layer DVD disk

  49. Disk Formatting (1) A disk sector

  50. Disk Formatting (2) An illustration of cylinder skew

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