1 / 14

Hardware/Software Co-design Design of Hardware/Software Systems

Hardware/Software Co-design Design of Hardware/Software Systems. A Class Presentation for VLSI Course by : Akbar Sharifi Based on the work presented in : PROCEEDINGS OF THE IEEE 1997 GIOVANNI DE MICHELI, FELLOW IEEE RAJESH K.GUPTA, MEMBER, IEEE

troy-hays
Download Presentation

Hardware/Software Co-design Design of Hardware/Software Systems

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Hardware/Software Co-designDesign of Hardware/Software Systems A Class Presentation for VLSI Course by : Akbar Sharifi Based on the work presented in : PROCEEDINGS OF THE IEEE 1997 GIOVANNI DE MICHELI, FELLOW IEEE RAJESH K.GUPTA, MEMBER, IEEE ------------------------------------------------------------------ Some Slides From : RASSP Education & Facilitation Program Module 14

  2. Outline Typical Co-Design Process Components of HS Problems Partitioning Scheduling Co-Simulation

  3. Typical Co-design Process Concurrent processes Programming languages System Description (Functional) FSM- directed graphs Unified representation (Data/control flow) HW/SW Partitioning SW HW Another HW/SW partition Interface Synthesis Hardware Synthesis Software Synthesis System Integration Instruction set level HW/SW evaluation

  4. Components of the Co-design Problem • Specification of the system • Hardware/Software Partitioning • Architectural assumptions - type of processor, interface style between hardware and software, etc. • Partitioning objectives - maximize speedup, latency requirements, minimize size, cost, etc. • Partitioning strategies - high level partitioning by hand, automated partitioning using various techniques, etc. • Scheduling • operation scheduling in hardware • Instruction scheduling in compilers • Process scheduling in operating systems • Modeling the hardware/software system during the design process

  5. Partitioning • A first order of impact on the cost/performance of the final design • In embedded systems : • Partition of system functionality into application-specific hardware and software executing on processors • In general purpose computing systems : • Captured by instruction set • In FPGAs : • Performing technology mapping

  6. Scheduling • Hardware and software scheduling differ in formulation and overall goals • Assign an execution start time to each task in a set • Tasks linked by some relations (e.g. dependencies, priorities….) • Important when several modules in the partition share a single hw unit • Tasks execution requires the use of resources that can be limited in number • Serialization of some task execution

  7. Operation Scheduling in Hardware • The techniques have been implemented in CAD tools • Operations are assumed to take a known, integer number of cycles to execute • Integer linear programming • The usual goal : minimize the overall execution latency • Satisfying the precedence and resource constraints • heuristic approaches: • list scheduling, • force directed scheduling

  8. Scheduling • Instruction scheduling in hardware • define a linear order of instructions • instruction selection and register allocation • goal: minimize code size and spills to memory • Coupling between scheduling • Pipelined microprocessors • Pipeline hazard avoidance • Process scheduling in operating systems • SJF • Roundrobin • FIFO

  9. Co-simulation • An HDL (VHDL or Verilog) simulation environment is used to perform behavioral simulation of the system hardware processes • A Software environment (C or C++) is used to develop the code • SW and HW execute as separate processes linked through UNIX IPC (interprocessor communications) mechanisms (sockets)

  10. Verilog Co-simulation Example Verilog HW Simulator Software processes communicate with hardware simulator via UNIX sockets Module: Application specific hardware HW proc 1 HW proc 2 SW proc 1 Verilog PLI (programming language interface) serves as translator, allowing hardware simulation models to communicate with software processes. Module: Bus Interface UNIX sockets Verilog PLI SW proc 2

  11. VHDL Co-simulation Example VHDL Simulator Software processes communicate with hardware simulator via foreign language interface Hardware Model in VHDL: RS232 module VME module Allowing hardware simulation models to “cosimulate” with software processes. SW proc 1 VHDL Foreign Language Interface SW proc 2

  12. Hardware/Software co-design is the key design technology for digital systems

  13. References • Hardware/Software Co-Design, 1996. (Codes/CASHE '96), Proceedings., Fourth International Workshop on • Hardware/Software Codesign of Embedded Systems, Design Modeling and Design VerificationUCSD computer science professor Rajesh Gupta and Cal-(IT)² researcher Ingolf Krueger

More Related