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Models of Hierarchical Memory

Models of Hierarchical Memory. Problem starts out on disk Solution is to be written to disk Cost of an algorithm is the number of input and output operations. Individual items may be blocked into blocks of size B. Two-Level Memory Hierarchy.

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Models of Hierarchical Memory

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  1. Models of Hierarchical Memory

  2. Problem starts out on disk Solution is to be written to disk Cost of an algorithm is the number of input and output operations. Individual items may be blocked into blocks of size B Two-Level Memory Hierarchy

  3. Items are blocked on the disk, with B items per block Any D blocks can be read or written simultaneously in one I/O Parallel Disk SubsystemsUnrestricted Parallel Model [Aggarwal, Vitter 1987]

  4. D blocks can be read or written simultaneously, but only if they reside on distinct disks More realistic than the unrestricted parallel model Still not entirely realistic, since the CPU may now become the bottleneck if D is large enough. Parallel Disk Subsystems:Parallel Disk Model [Vitter, Shriver 1990]

  5. H hierarchies of the same type (with H CPUs) are connected by a “network” The network can do sorting deterministically in log Htime Parallel Memory Hierarchies 1 2 … H

  6. The number of disks D can be either more than, the same as, or less than the number of processors. P Processors/D Disks

  7. Access to memory location x takes time f(x) f is a non-decreasing function such that there exists a constant c such that f(2x) ≤ cf(x) for all x Multilevel Memory Hierarchies:Hierarchical Memory Model (HMM) [Aggarwal, Alpern, Chandra, Snir 1987]

  8. Access to memory location x takes time f(x) Once an access has been made, additional items can be “injected” at a cost of one per item Multilevel Memory Hierarchies:Block Transfer Model (BT) [Aggarwal, Chandra, Snir 1987]

  9. There is a hierarchy of exponential-sized memory modules Each bus has a bandwidth associated with it All the buses can be active simultaneously Multilevel Memory Hierarchies:Uniform Memory Hierarchies (UMH) [Alpern, Carter, Feig 1990] bandwidth b (l ) l l ar blocks each of size r

  10. P-HMM f(x) = log x f(x) = x Algorithm is uniformly optimal for any cost function P-BT f(x) = log x f(x) = x , 0 < a < 1 f(x) = x , a = 1 f(x) = x , a > 1 Parallel Memory Hierarchies:Results a a a [Vitter, Shriver 1990] a These results use a modified Balance Sort for deterministic upper bounds

  11. P-UMH b(l) =1 b(l) = 1/(l+1) b(l) = r P-RUMH As above except tight lower bound for b(l) = 1/(l+1) P-SUMH b(l) =1 b(l) = 1/(l+1) b(l) = r Parallel Memory Hierarchies:More Results -cl -cl These results use a modified Balance Sort for deterministic upper bounds

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