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Applications of Synchronous Circuits ( Class 10.2 – 3/28/2013). CSE 2441 – Introduction to Digital Logic Spring 2013 Instructor – Bill Carroll, Professor of CSE. Today’s Topics. FSM application examples Sequence recognizer Code converter Controller Synchronous circuit minimization
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Applications of Synchronous Circuits(Class 10.2 – 3/28/2013) CSE 2441 – Introduction to Digital Logic Spring 2013 Instructor – Bill Carroll, Professor of CSE
Today’s Topics • FSM application examples • Sequence recognizer • Code converter • Controller • Synchronous circuit minimization • State reduction • State assignment
Sequence Recognizer for 01 in a Block Code of Block-Length Two
Test Your Understanding Design a realization of the block 01 recognizer. Use the following state assignment and JK flip flops. A: 00, B: 01, C: 10
Test Your Understanding – Self-Check State Table Transition/Output Table Output K-map Excitation K-maps J1 = xy2’ K1 = 1 or y1 J2 = x’y1’ K2 = 1 or y2
Design a Recognizer for the Sequence 1111Example 8.11 Figure 8.29 Note: This solution assumes non-block sequences and allows overlap. How would the solution change for block sequences and no overlap?
Code Converter Example Design a finite state machine to convert 3-bit binary code words to 3-bit Gray code words. x: 000001010101111 Z: 000001011111100
Three-bit Binary to three-bit Gray State Diagram Assumes starting state A
Robot Controller -- Example 8.17 Finite-State Controller – A finite state machine that produces outputs that control the behavior of an electronic or electromechanical system based on controller inputs and state. Figure 8.39
Robot Controller Specifications x = 1: robot in contact with an obstacle x = 0: robot not in contact with an obstacle z1 = 1: turn left z2 = 1: turn right Control algorithm: When an obstacle is encountered, turn right until cleared. Next time an obstacle is encountered, turn left until cleared. Continue alternating turns as obstacles are encountered. State A: No obstacle, last turn was left State B: Obstacle, turn right State C: No obstacle, last turn was right State D: Obstacle, turn left
Robot Controller Design Figure 8.40 (a) -- (e) z1= xy1 z2= xy1’
Robot Controller Excitation Equations J1 K1 J2 K2 J1 = x’y2 K1 = x’y2’ J2 = xy1’ K2 = xy1
Robot Controller Realization z1= xy1 z2= xy1’ J1 = x’y2K1= x’y2’ J2= xy1’ K2= xy1 Figure 8.40 (f)
Synchronous Circuit Minimization • Eliminate redundant states • May reduce the number of flip flops needed • Usually reduces the number of combinational logic devices needed • Make an optimal state assignment – usually reduces the number of combinational logic devices needed
Redundant States in Synchronous Circuits Removal of redundant states is important because • Cost: the number of memory elements is directly related to the number of states • Complexity: the more states the circuit contains, the more complex the design and implementation becomes • Aids failure analysis: diagnostic routines are often predicated on the assumption that no redundant states exist
Equivalent States • States S1, S2, …, Sj of a completely specified sequential circuit are said to be equivalent if and only if, for every possible input sequence, the same output sequence is produced by the circuit regardless of whether S1, S2, …, Sj is the initial state. • Let Si and Sj be states of a completely specified sequential circuit. Let Sk and Sl be the next states of Si and Sj, respectively for input Ip. Si and Sj are equivalent if and only if for every possible Ip the following are conditions are satisfied. • The outputs produced by Si and Sj are the same, • The next states Sk and Sl are equivalent.
Equivalent States Illustration Figure 9.1
Methods for Finding Equivalent States • Inspection • Partitioning • Implication Tables
Finding Equivalent States By Inspection Figure 9.2
Equivalence Relations • Equivalence relation: let R be a relation on a set S. R is an equivalence relation on S if and only if it is reflexive, symmetric, and transitive. An equivalence relation on a set partitions the set into disjoint equivalence classes. • Example: let S = {A,B,C,D,E,F,G,H} and R = {(A,A),(B,B),(B,H),(C,C),(D,D),(D,E),(E,E),(E,D),(F,F),(G,G),(H,H), (H,B)}. Then P = (A)(BH)(C)(DE)(F)(G) • Theorem: state equivalence in a sequential circuit is an equivalence relation on the set of states. • Theorem: the equivalence classes defined by the state equivalence of a sequential circuit can be used as the states in an equivalent circuit.
Finding Equivalent States by Partitioning • Overview – Successively refine partitions of states until two consecutive partitions are identical. States in the same block of the final partition are equivalent. • Step 0 – P0: All states in one block. • Step 1 – P1: Partitions are refined by outputs. • Step 2 – P2 to Pk: Partitions are refined by next states. • Step 3 – Pk = Pk+1: Final blocks define equivalent states.
Partitioning Example Reconsider the sequential circuit from Figure 9.1 (b) P0 = (ABCDE) P1 = (ABC)(DE) P2 = (A)(BC)(D)(E) P3 = (A)(BC)(D)(E) Hence, B ≡ C.
Partitioning Example (concluded) Figure 9.3
Test Your Understanding Find all equivalent states.
Test Your Understanding – Self Check P0 = (ABCDEFGH) P1 = (AD)(BE)(CF)(GH) P2 = (AD)(BE)(CF)(G)(H) P3 = (AD)(BE)(CF)(G)(H) A ≡ D: A’ B ≡ E: B’ C ≡ F: C’ G: D’ H: E’ Figure 9.4