1 / 50

Chapters 4, 5, and 6

Chapters 4, 5, and 6. Ch. 4: data movement instructions Mov, shift, push, pop, etc. Ch. 5: arithmetic and logic instructions Add, sub, and, or, mul, div, etc. Ch. 6: program control instructions Jump, call, etc. Number of Data Operands. Zero-operand instructions

varden
Download Presentation

Chapters 4, 5, and 6

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Chapters 4, 5, and 6 • Ch. 4: data movement instructions • Mov, shift, push, pop, etc. • Ch. 5: arithmetic and logic instructions • Add, sub, and, or, mul, div, etc. • Ch. 6: program control instructions • Jump, call, etc.

  2. Number of Data Operands • Zero-operand instructions • data is accessed from a “default” location, which is typically the “stack” (a LIFO (last-in-first-out) queue) • One-operand instructions • the accumulator (ACC) register is used as the default second data input and destination • Two-operand instructions • one of the data inputs is the default destination • Three-operand instructions

  3. 3 operand instruction ADD d, s1, s2 ; d := s1+s2 2 operand instruction ADD d, s1 ; d := d+s1 1 operand instruction ADD s1 ; ACC := ACC+s1 0 operand instruction ADD ; top_of_stack := top_of_stack + next_on_stack

  4. Data Movement Instructions • MOV Variations • Move from register to register • Move from memory to register • Move from memory to register • Move from/to segment registers • Different types of addressing modes (Ch. 3) • Different sizes of data and data alignment • Byte, word, double-word • Word and double-word alignment

  5. x86 Instruction Format OPcode (1-2 bytes) MOD REG R/M scaled index displacement(0~4bytes) immediate(0~4bytes) Scaled index byte General form of 1st byte Direction of data flow(D) D=0 : REG -> R/M D=1 : R/M -> REG Data size W=0 : data size is byte W=1 : data size is word or doubleword s s D W ss 00 = x1 01 = x2 10 = x4 11 = x8 index base OPcode REG

  6. MOD Field • MOV AL, [DI] • MOV AL, [DI+2] • MOV AL, [DI+1000H]

  7. Binary (or Machine Language) Representation • MOV BP, SP • Fig 4-4 REG OPcode (1-2 bytes) MOD REG R/M scaled index displacement(0~4bytes) immediate(0~4bytes)

  8. Binary (or Machine Language) Representation • MOV DL, [DI] • Fig. 4-5 OPcode (1-2 bytes) MOD REG R/M scaled index displacement(0~4bytes) immediate(0~4bytes)

  9. Binary (or Machine Language) Representation • MOV WORD PTR [BX+1000H], 1234H • Fig. 4-9 OPcode (1-2 bytes) MOD REG R/M scaled index displacement(0~4bytes) immediate(0~4bytes)

  10. Stack Operations • Stack implemented using stack pointers and stack operations • LIFO (last-in first-out) data structure • SS (Stack Segment) register contains the beginning of stack segment • In real-mode, start of stack = SS * 10h, length = 64K • SP (Stack Pointer) contains current TOS (top of stack)

  11. PUSH and POP • Stack: LIFO (last in first out) • SP grows downwards • PUSH AX

  12. PUSH and POP PUSH BX : SP <- SP-2 POP CX : SP <- SP+2

  13. POP

  14. PUSHA

  15. Cyclic Nature in PUSH/POP • PUSH CX ; cyclic address calculation

  16. Load-Effective Address • Assume an array called LIST • MOV BX, LIST • MOV BX, OFFSET LIST ; assembler calculates the offset • LEA BX, LIST ; microprocessor calculates the offset

  17. String Data Transfers • LODS (load string), STOS (store string), MOVS (move string), INS (IN string), OUTS (out string) • Uses DI register for the destination (in ES) or the SI register for the source (in DS) • LODS • loads AL, AX, or EAX with data at DS:[SI] • SI auto-increments if D=0 (auto-decrements if D=1) • STOS • Stores AL, AX, or EAX at ES:[DI] • DI auto-increments if D=0 (auto-decrements if D=1)

  18. String Data Transfers • LODS cases

  19. String Data Transfers • REP (repeat) prefix • Causes CX (count) register to decrement by 1 each time string instruction executes • Instruction terminates when CX = 0

  20. String Data Transfers • MOVS • The only memory-to-memory transfer • Transfers data from DS:[SI] to ES:[DI]

  21. String Data Transfers • INS (input string) • Transfers data from an I/O device (whose address is in DX) to ES:[DI] • OUTS • From DS:[SI] to an I/O device (by DX)

  22. IN and OUT IN AX, 11H OUT 10H, AX Port data Port data 1234H abcdH Data bus Data bus Port address Port address Microprocessor Microprocessor Address bus Address bus 10H 11H Control signal Control signal IOWC IORC AX = 1234H AX <= abcdH

  23. Assembler Directives • Refer to Table 4-22 • Procedure

  24. Homework • Chapter 4: 9, 21

  25. Chapter 5Arithmetic and Logic Instructions • Addition • Table 5-1 and Table 5-3 • ADD, ADC (add with carry) • Subtraction • Table 5-4 and Table 5-6 • SUB, SBB (subtract with borrow) • Comparison • Implemented using subtraction • Just set flags; don’t change register value • Other arithmetic and logic instructions

  26. Addition-with-Carry (ADC) • Addition of data whose size is larger than register

  27. Subtraction-with-Borrow (SBB)

  28. Multiplication (MUL, IMUL) • Multiplicand is always in AL (AX or EAX) • Product is in AX (DX-AX, or EDX-EAX)

  29. Division • 8b division = 16b/8b • DIV CL ; AX / CL • Dividend: AX, quotient: AL, remainder: AH (with dividend’s sign) • 16 division • Dividend: DX-AX, quotient: AX, remainder: DX • Errors • Divide by zero • Divide overflow (divide by too small a number)

  30. Division • Round the quotient

  31. Logical AND and OR • AND is often used for masking • OR is often used for setting ‘1’

  32. Exclusive OR • Selective inversion • XOR CH, CH • 2byte instruction • MOV CH, 0H • 3byte instruction

  33. TEST, NOT, NEG • TEST instruction performs the AND operation without changing the destination operand • NOT: logical inversion (1’s complement) • NEG: arithmetic sign inversion (2’s complement)

  34. SHIFT • SHL AX, 1 • SHR BX, 12 • SAR • Arithmetic right shift

  35. Multiplication with Shifts

  36. ROTATE • Shift a wide number

  37. String Comparisons • SCAS (string scan instruction) • The contents of the extra segment memory location addressed by DI is compared with AL, AX, or EAX • CMPS (compare strings instruction) • Compared DS:[SI] and ES:[DI] • Auto-increment (auto-decrement) SI and DI

  38. Chapter 6Program Control Instructions • Jump • Procedure

  39. Comparison (CMP) • CMP is a subtraction that changes only the flag bits

  40. Program Control Instructions • Unconditional branch (or jump): JMP • Conditional branch (or jump): J<cond> • Table 6-1 • Assembler directives used for program control • Makes assembly more like a high-level language • .if, .else, .elseif, .endif • do-while loops • repeat-until loops • procedures (procedure vs. macro)

  41. JMP Instructions short jump near jump far jump

  42. Conditional JMP Instructions

  43. Procedure • CALL procedure_name • Pushes the return address, i.e., the address of the instruction following the CALL on the stack • Jump does not consider return address!!! • RET instruction (in the procedure) removes an address from the stack to put it in IP • NEAR and FAR calls • 3B (NEAR) and 5B (FAR) instruction: similar to Jump • Return address is 2B (NEAR) and 4B (FAR)

  44. Procedure Examples • USES pushes/pops registers on/from stack on procedure entry/exit

  45. Directive USE

  46. Near CALL

  47. Far CALL

  48. CALL with Register Operand • Jump to the offset address in the register operand

  49. RET

More Related