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MIPS Interrupts

MIPS Interrupts. MIPS interrupts. The materials of this lecture can be found in A7-A8. Also, the slides are developed with the help of http://jjc.hydrus.net/cs61c/handouts/interrupts1.pdf. The MIPS memory. Actually, everything above 0x7fffffff is used by the system. What is in there?.

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MIPS Interrupts

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  1. MIPS Interrupts

  2. MIPS interrupts • The materials of this lecture can be found in A7-A8. • Also, the slides are developed with the help of http://jjc.hydrus.net/cs61c/handouts/interrupts1.pdf

  3. The MIPS memory • Actually, everything above 0x7fffffff is used by the system.

  4. What is in there? • Special operating system functions • I/O registers mapped to memory addresses • …

  5. SPIM Simulator • SPIM allows you to read from key board (which is similar to reading something from the true I/O register)

  6. trykeyboard.asm . .text .globl main main: addu $s7, $ra, $zero, # Save the ra addi $s0, $0, 113 #q addi $t0, $0, 0 lui $t0, 0xFFFF # $t0 = 0xFFFF0000; waitloop: lw $t1, 0($t0) andi $t1, $t1, 0x0001 # $t1 &= 0x00000001; beq $t1, $zero, waitloop lw $a0, 4($t0) beq $a0, $s0, done li $v0,1 syscall li $v0,4 la $a0, new_line syscall j waitloop done: addu $ra, $s7, $zero jr $ra .data new_line: .asciiz "\n" Remember to call SPIM with -mapped_io option

  7. question • Is this the most efficient way to do it? • Remember that the processor usually has a lot of things to do simultaneously

  8. Interrupt • The key problem is that the time when the input occurs cannot be predicted by your program • Wouldn’t it be nice if you could “focus on what you are doing” while be “interrupted” if some inputs come?

  9. MIPS Interrupt

  10. MIPS Interrupt • $k0 and $k1 are both used as temporary variables in interrupt servicing routines. • Coprocessor 0 is also used with interrupts. In Coprocessor 0, registers $8, $12, $13, and $14 are all important in servicing interrupts. • These registers can be read and modified using the instructions mfc0 (move from coprocessor 0) and mtc0 (move to coprocessor 0).

  11. MIPS Interrupt

  12. Status Register

  13. Cause Register

  14. Cause

  15. EPC Register • The EPC register contains the value of the program counter, $pc, at the time of the interrupt. This is where the program will return after handling the interrupt.

  16. trykbint.asm .kdata s1: .word 0 s2: .word 0 new_line: .asciiz "\n" .text .globl main main: addu $s7, $ra, $zero # Save the ra mfc0 $a0, $12 ori $a0, 0x11 mtc0 $a0, $12 addi $t0, $0, 0 lui $t0, 0xFFFF # $t0 = 0xFFFF0000; addi $a0, $0, 2 sw $a0, 0($t0) here: j here addu $ra, $s7, $zero jr $ra . ktext 0x80000180 .set noat move $k1 $at # Save $at .set at sw $v0 s1 # Not re-entrant and we can't trust $sp sw $a0 s2 # But we need to use these registers mfc0 $k0 $13 # Cause register srl $a0 $k0 2 # Extract ExcCode Field andi $a0 $a0 0x1f bne $a0, $zero, ret # Exception Code 0 is I/O. addi $v0, $0, 0 lui $v0, 0xFFFF # $t0 = 0xFFFF0000; lw $a0, 4($v0) li $v0,1 syscall li $v0,4 la $a0, new_line syscall ret: lw $v0 s1 # Restore other registers lw $a0 s2 .set noat move $at $k1 # Restore $at .set at mtc0 $0 $13 # Clear Cause register mfc0 $k0 $12 # Set Status register ori $k0 0x11 # Interrupts enabled mtc0 $k0 $12 eret

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