System 2020: Research Grand Challenges in Computer Architecture

1. System 2020:Research Grand Challenges in Computer Architecture Mary Jane Irwin Penn State University John Shen Intel

2. Eniac What is the next big thing ? Mainframes Mini’s Workstations PC’s ???

3. What are the mega trends ? • Wired  Wireless • Telecommunication • Internet/Computing • Patch-work Wireless  Blanket Wireless • Personal Computer  Mobile Computer  Persistent/Transparent Computer • Embedded vs. High-end  Convergence? • Sever vs. Client  Convergence?

4. And anticipated usage models ? • Human-centric: • Intelligent spaces • For work, education, leisure, entertainment • Active displays, sensory devices, immersive experience • Personal agents • Feature rich gadgets; useful real-time information • Highly mobile, roam seamlessly from space to space • Infrastructure-centric: • Traditional server farms and data centers • Very large scale information fusion, storage, analysis • Communication and synchronization between spaces • Fabric for supporting human-centric uses • Proactively pushing information to roaming agents • Support enormous number of distributed and roaming “servers”

5. The computing paradigm ala Google

6. The computing paradigm ala Nokia

7. What are the components of a GC? • A “grand” scale problem that will require at least a decade of concentrated research to make substantive progress • that has a measurable outcomes/milestones, • that will excite and engage the computer architecture research community, • and that is deserving of considerable investment by funders because it will materially advance the capabilities and conduct of society.

8. 1W Featherweight Supercomputer • For the goal of 1TOP/W will need 250 to 1000X improvement in performance/W • 1TOP/W = .001 nJ/op vs today’s ~30nJ/op • Architects are already engaged • Funding and impacts • societal impacts are clear and compelling: pervasive intelligent sensors, embedded supercomputing appliances, . . . • funding investments?

9. Featherweight Challenges • power/energy reductions • dynamic and leakage, HW/SW mode controls, . . . • technology issues (65nm45nm32nm) • ↑ process variation, ↑ transient/aging faults, advanced packaging (SoC  MCP  3D), . . . • design issues • cost, design time & tools, verification & test, . . . • performance improvements • CMPs & SMT, heterogeneous cores, programmable accelerators, eDRAMs, NoCs, . . . • programmability . . .

10. Popular Parallel Programming (P3) • Software and architecture support that makes parallel programming easy • If 2X per 2 year perf. gains continue, will soon have 1000-way chip-level parallelism • Architects are becoming engaged but can’t do the job alone • need compiler, system & application developers • Funding and impacts • a necessary enabling technology for future chips (e.g., the 1W Featherweight Supercomputer) • funding investments?

11. P3 Challenges • new programming languages/models • that are correct, efficient, scalable, portable, . . . • that require minimal exposure of the programmer to low-level details • and that support multi-modal parallelism • data-parallel, embarrassingly parallel, irregularly parallel • microarchitecture support • lightweight thread/process communication and synchronization, monitoring for reliability and thermal hot spots, dynamic adaptation, . . . • development support • benchmarks, prototyping platforms, tools for debugging, performance tuning, . . .

12. Dependable Systems 1. Self-healing, trustworthy hardware and software systems everywhere • Low-cost computing you can trust your life on • 2x improvement in mean work-to-failure per generation • Cost of ownership, vendor costs for liability/repair 2. Architects already engaged but can’t do the job alone • A system stack problem – devices, circuits, languages, OS, applications, dependability analysts 3. Funding and impacts • The s/w problem alone is ~ 0.6% GDP of the US • funding investments?

13. Dependable Systems Challenges • Host of hardware reliability problems • Transient, aging, infant mortality, variations,… • Software reliability, security getting worse • Steep constraints • Area, power, perf (even for high-end systems) • Architects can provide low cost solutions • Workload-aware, selective, fast, adaptive • Bring dependability to h/w-s/w interface • Adapt to trade off reliability, security, perf, power • Integrated cross-layer solution from devices to app

14. New Computing Models • Beyond the stored program architecture • data flow? neural network? • “Expanding the box” for architects • neuroscientists, biologists, chemists, . . . • Funding and impacts • neuro-prosthetics, telepathy, . . . • funding investments?

15. “Brain” Challenges • High risk – but high payoff • Neuroscientists are a long way from unraveling the mysteries of the neocortex • Take partial steps – augment certain brain functions (hearing for the deaf, vision for the blind, mobility for the quadrapeligic), • Take advantage of emerging technologies • Heterogeneous systems: silicon + nanosensors and actuators, emerging nanotechnologies (CNT, QCAs, quantum, . . .)

16. Watch for the final report http://www.cra.org/Activities/grand.challenges/architecture/home.html • And check out the reports from the previous Grand Challenges conferences http://www.cra.org/grand.challenges/