E N D
5. Parity check: 2 method VRC Vertical Redundancy Check
LRC Longitudanal Redundancy Check
Redundancy ????
6. Parity : 2 type Odd parity
Even parity
10. example Vertical Redundancy Check (VRC)
14. VRC Performance VRC can detect all single-bit errors. It can also detect burst errors as long as the total number of bits changed is odd (1,3,5etc)
How bout if the total number of bit changed is even ??? Yea.. There is problem !!!
In short VRC can detect all single-bit errors. It can detect burst errors only if the total number of errors in each data unit is odd.
17. e.g. problem in LRC
18. Performance of LRC LRC increases the likelihood of detecting burst errors. As we showed in the previous e.g. an LRC of n bits can easily detect a burst error of n bits.
A burst error of more than n bits is also detected by LRC with a very high probability.
-note for Jabatan Tanah daerah Temerloh Mr. Hakim (2004 co)
27. Checksum generator In the sender, the checksum generator subdivides the data unit into equal segments of n bits (usually 16).
These segments are added together using ones complement arithmetic in such a way that the total is also n bits long.
The total(sum) is then complemented and appended to the end of the original data unit as redundancy bits, called checksum field.
The extended data unit is transmitted across the network.
So if the sum of the data segment is T, the checksum will be -T
29. Checksum checker The receiver subdivides the data unit as above and adds all segments together and complements the result.
If the extended data unit is intact, the total value found by adding the data segments and the checksum field shud be zero.
If the result is not zero, the packet contains an error and the receiver rejects it.
30. The sender follows these steps: The unit is divided into k sections, each of n bits
All sections are added together using ones complement to get the sum.
The sum is complemented and becomes the checksum.
The checksum is sent with the data.
31. The receiver follows these steps The unit is divided into k sections, each of n bits.
All sections are added together using ones complement to get the sum.
The sum is complemented.
If the result is zero, the data are accepted. Otherwise, they are rejected.
38. All bit positions that are powers of 2 are used as parity bits. (positions 1, 2, 4, 8)
All other bit positions are for the data to be encoded. (positions 3, 5, 6, 7, 9, 10, 11)
Each parity bit calculates the parity for some of the bits in the code word. The position of the parity bit determines the sequence of bits that it alternately checks and skips.
General rule for position n: skip n-1 bits, check n bits, skip n bits, check n bits...
Position 1 (n=1): skip 0 bit (0=n-1), check 1 bit (n), skip 1 bit (n), check 1 bit (n), skip 1 bit (n), etc. (1,3,5,7,9,11...)
Position 2 (n=2): skip 1 bit (1=n-1), check 2 bits (n), skip 2 bits (n), check 2 bits (n), skip 2 bits (n), etc. (2,3,6,7,10,11...)
Position 4 (n=4): skip 3 bits (3=n-1), check 4 bits (n), skip 4 bits (n), check 4 bits (n), skip 4 bits (n), etc. (4,5,6,7,12...)
Position 8 (n=8): skip 7 bits (7=n-1), check 8 bits (n), skip 8 bits (n), check 8 bits (n), skip 8 bits (n), etc. (8-15,24-31,40-47,...)