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The Processor Simulator

The Processor Simulator. Alex Lusco. Outline. What is the goal of PSIM? The Original PSIM The New PSIM The Instruction Set The GUI The Code Other Simulators Future Improvements Summary. What is the goal of PSIM?.

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The Processor Simulator

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  1. The Processor Simulator Alex Lusco

  2. Outline • What is the goal of PSIM? • The Original PSIM • The New PSIM • The Instruction Set • The GUI • The Code • Other Simulators • Future Improvements • Summary

  3. What is the goal of PSIM? • The PSIM program aims to simulate the underlying architecture of a simple embedded processor in a way that is easy to understand and simple to use. • It presents a GUI which allows the user to control the processor and assemble and run simple assembly programs. • In addition, its main objective is to be used as an education tool that is straight forward enough for a inexperienced student to learn more about processor architectures using an interactive interface.

  4. The Original PSIM • Developed by Dr. Stroud • C. Stroud “PSIM: Processor SIMulator (version 4.2)”, July 2003 • Available at http://www.eng.auburn.edu/~strouce/ausim.html • 16 instructions • It is a 16-bit DOS based application • Newer 64-bit versions of windows will not run it • Based on the simple computer architecture found in [1] • About 8 instructions • Simple multi-cycle controller with an accumulator and combined program/data RAM. • Allowed clock control of the simple processor that would run user loaded assembly programs [1] M. Morris Mano, Computer Engineering Hardware Design, Prentice Hall, pp. 280-292, 1988.

  5. The New PSIM • Windows Based • Written using the Microsoft .NET framework • Expands the capabilities of the original PSIM • Added new instructions • Added additional registers • Added a more advanced GUI • Attempts to keep the simulator as simple as possible • Provides more detailed information about executing instructions and signal levels.

  6. PSIM Architecture • The PSIM is an 8-bit multi-cycle architecture that is loosely based on the original architecture of the PSIM • Major Components Include • ALU with Zero and Carry flag • A single input and output register • 256 Byte, 8-bit addressable Instruction ROM • 256 Byte, 8-bit addressable Data RAM • Supports JUMP & Branch instructions • Relies on level sensitive components and a sequential controller • This is a poor way to do it, and will need to be redesigned since it is difficult to synthesize without timing problems

  7. Block Diagram of Data Path

  8. ALU Type Diagram of Data Path

  9. PSIM Instruction Set • All instructions are 16-bits • 5-bit OP Code • 2-bit Destination Register Code • 1-bit V flag to determine source is a register or a value • Four Instruction Types • No Operand – Requires only OP Code be filled in • Single Operand – If an operand is a register the REG section will be filled with the number1-3 to denote the register. If its operand is a value it will set the V bit and put the value in the second-half of the instruction. • Two Operand – All two operand instructions require the first to be a register so it will have the number 1-3 filled in. If the second operand is a register the V-bit will be 0 and the operand will be a number 1-3 for the appropriate register. If it is a value the V-bit will be 1 and the operand will be the value to be used. • Three Operand – These are branch instructions which require two registers and an address. The REG section is filled in with the first register, the V and MSB of the operand hold the second register, and the address is stored in the 7-bits remaining.

  10. PSIM Instruction Set • Basic • HALT • LOAD • LDCR • LDZR • LDM • STM • Arithmetic & Logic • ADD • SUB • AND • OR • NOT • XOR • Shift Instructions • LSL/LSR • ROL/ROR • IO Instructions • IN • OUT • Branch & Jump • JUMP • BEQ • BNE • BRZ • BNZ • BRC • BNC

  11. PSIM Assembler • Registers are represented by a % sign • i.e. %a, %b, %c • Hex and Decimal values are interchangeable • i.e. $A for hex and 10 for decimal • Labels are supported for jumping • Define a label via the :label syntax • Reference a label in an instruction using the @ sign • i.e. jump @label • Comments are supported using the ‘;’ prefix • i.e. ; this is a comment • All applicable instructions support adding register to the instruction • i.e. ADDA %b instead of ADD %a %b

  12. PSIM Assembly Example ; Simple Multiplier ; Multiplies an input value by 5 INA LDB 5 LDC 0 ; Multiplication Loop :Mult ADDC %a SUBB 1 BNZ @Mult ; Output the value in Register C OUTC HALT • This example program takes the value stored in the input register and places it in Register A • It then loads Register B with 5 and Register C with 0 • It then loops adding the value into Register A to Register C 5 times • Finally it places the value in Register C to the output register. • This effectively multiplies the input Register by 5 and moves it to the output

  13. The GUI • The GUI offers four main options when running a program • Set Inputs – Sets the value on the input register • Run To Halt – Runs through the last instruction • Reset – Resets the PC and registers starting over execution • Clock – Clocks the program a single time • The system clock is controllable • For convenience, all values can be displayed in either binary, octal, decimal, or hex. • Support dialogs i

  14. The GUI – Support Dialogs • Instruction Window • Displays the currently executing line number and instruction • Displays the currently step that the processor is executing (FETCH, LOAD, STORE, ALU) etc. • Signal Window • Displays a histogram of any signal in the simulator • Can zoom in and out to see exactly how a signal bus has changed over time • Maximum view of 16 seconds • Minimum view of .01 seconds • Viewable signals only limited by processor power (In most cases this is around five)

  15. The Code • The code of the PSIM is written in C# 3.0 • It is separated into four distinct code sections • PSIMedu.Core.dll – Includes all core functionality including data types, the assembler, and other basic functions • PSIMedu.Components.dll – Includes all logic components of the simulator • PSIMedu.Drawing.dll – Includes all drawing code for components • PSIMedu.exe – Defines the interconnections and instantiates components.

  16. The Code • How Signals Work • System is event-driven similar to a VHDL process • Each component provides a “sensitivity list” and is notified when any signal in that list changes • Combinational components are treated like a process with all signals in a sensitivity list. When any signal changes the “process” is notified. • See Counter Example • Biggest Challenges • Represent different data types (such as variable width buses) and implementing arithmetic operations on non-standard types • Drawing different blocks each with a different number of ports

  17. Counter Example PSIM Code VHDL Module • if (_reset.GetValue()) • { • _value.Reset(); • _output.UpdateValue(_value.GetCopy()); • } • else if (p == _clock && e.Value == true) • { • if (_load.GetValue()) • { • _value = _din.GetValue(); • _overflow.UpdateValue(false); • } • else • { • if (_value.Increase(1)) • _overflow.UpdateValue(true); • else • _overflow.UpdateValue(false); • } • _output.UpdateValue(_value.GetCopy()); • } • Process(CLK, RST) begin • If (RST = ‘1’) then • value <= (others => ‘0’); • Elsif (CLK = ‘1’ and CLK’event) then • if (LOAD = ‘1’) then • value <= din; • Else then • value <= value + 1; • End If; • End If; • End Process;

  18. Code Statistics • There is a total of 10,717 lines of C# code (including comments) • There is a total of 3221 lines of XML, used for comments as well as various data storage components in version 2.0 • Data Types are a lot of the code • The bit data type is a total of 400 lines of code • More advanced types (4-bit, 8-bit, 16-bit, 32-bit) are 1000 lines of code • In contrast the code to define the main controller is only 800 lines of code • In version 2.0 the code for all data types is 750; however, it can product an unlimited number of data types (very similar to bit and bit_vector from vhdl)

  19. Other Simulators • Very Simple CPU and Relatively Simple CPU • Student Resource for Computer Systems Organization and Architecture by John D. Carpinelli • Written in Java and accessible via the web • Very Simple CPU is a small multi-cycle processor with a 6-bit address bus with up to 64 bytes of memory and a total of four instructions. • Relatively Simple CPU is a scaled up version with a 16-bit address bus and up to 64K of memory and a total of sixteen instructions. • Advantages • Platform independent since it is written in Java • Can model both micro-coded and hardwired control unit • Provides highlighting of moving signals for quick access • Disadvantages • Confusing interface (multiple windows to view system output which can lead to difficult to follow execution) • Does not provide a detailed look at signal history • Both have a limited instruction set and while the relatively simple simulator is more robust it still has limited branching and IO support.

  20. Future Improvements • Fix architecture so that the controller is combinational and the components are edge triggered to fix all timing concerns for synthesis • VHDL model of processor • Provide different architectures for simulations • Expand Capabilities of Tool • Make it easier to demonstrate and build new architectures • Allow dynamic creation of logic components so custom components can be added

  21. Summary • Current iteration already makes it easier to understand the beginnings of embedded processors • The ability to simulate multiple architectures is the key to achieving educational tool goal • Additional more complicated architecture models would allow for extended use at more advanced class levels • Simple architecture models would allow for even basic class levels • To simulate those different architectures, the simulator should function more as a generic logic simulator in the next version

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