EECE 320 Digital Systems Design Lecture 23: Sequential Logic Design Principles

1. EECE 320Digital Systems DesignLecture 23: Sequential Logic Design Principles Ali Chehab

2. Clocked Synchronous State-Machine Design • Specification  State/Output Table or State Diagram • (Optional) Minimize number of states • State assignment: Choose state variables • Create a transition/output table • Choose a Flip-Flop type • Construct an excitation table • Derive excitation equations from excitation table • Derive output equations from transition/output table • Draw the corresponding logic diagram

3. Design Example 1 • Design a circuit that detects three or more 1’s in a string of bits coming through an input line. • Example: • Input = 0 0 1 1 1 Output = 0 0 0 0 1 • Input = 0 0 1 0 1 Output = 0 0 0 0 0 • Input = 0 1 1 1 1 Output = 0 0 0 1 1

4. 1 0 Out=0 Out=0 1 1 1 x11 x111 0 x1 Out=1 0 Out=0 0 0 Step 1: State Diagram

5. Step 2: State/Output Table

6. Step 3: Transition/Output Table • State variables: Q1, Q0 where S0=00, S1=01, S2=10, S3=11 • Input variable: X • Output variable: Y

7. Step 4: Excitation Table Using D Flip-Flops • Excitation Table: Shows the value required at each flip-flop’s D input for each state/input combination. • For D flip-flops: We have D = Q*, so transition table = excitation table. • 4 states ==> 2 flip-flops with D-inputs D1, D0

8. Q1Q0 X D0 = X.Q1 + X.Q0’ Q1Q0 X D1 = X.Q1 + X.Q0 Step 5: Write minimized Boolean Equations For D0, D1 • K-Map for D0: • K-Map for D1:

9. Step 6: Output Equation • Y = Q1. Q0

10. Q Q D D C C Step 7: Logic Diagram Q1 Y Q0 Q0’ CLK X

11. State-Machine Design Example • Two inputs A and B, and one output Z • Z = 1 if: • A had the same values for the previous 2 clock ticks • B has been 1 since last time first condition was true • Otherwise Z = 0

12. State-Machine Design Example Evolution of a State Table

13. State-Machine Design Example Evolution of a State Table

14. State-Machine Design Example State Minimization • Identify equivalent states • 2 states S1 and S2 are equivalent if: • S1 and S2 produce the same values at the output • For each input combination, S1 and s2 lead to the same next state OK00  OKA0 OK11  OKA1

15. State-Machine Design Example State Assignment • How many binary variables are needed to represent all states? With s states, we need n variables: n = log2s. • For s=5, n=3. We need 3 flip-flops => 8 states, with 3 unused. • Assign specific combinations to named states: • Choose an easy initial state: all 0’s or all 1’s • Minimize # of state variables changes on each transition • Decompose the set of state variables into individual bits or fields having defined meanings with respect to inputs or outputs

16. State-Machine Design Example State Assignment • One-hot encoding uses 1 flip-flop per state, hence more flip-flops but simpler excitation equations • For unused states choose between min. risk or min. cost

17. State-Machine Design Example Synthesis Using D Flip-Flops Decomposed Assignment Transition/Output Table

18. State-Machine Design Example • Synthesis Using D Flip-Flops D = Q* for D Flip-Flop Excitation and Transition tables are the same, which is not the case for other flip-flop types. Excitation table equivalent to truth table for 3 functions (D1, D2, D3) of 5 variables (A, B, Q1, Q2, Q3)  Karnaugh maps. Excitation/Output Table