1 / 21

BJT Fixed Bias

BJT Fixed Bias. ELEC 121. BJT Biasing 1. For Fixed Bias Configuration: Draw Equivalent Input circuit Draw Equivalent Output circuit Write necessary KVL and KCL Equations Determine the Quiescent Operating Point Graphical Solution using Loadlines Computational Analysis

wilma-allen
Download Presentation

BJT Fixed Bias

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. BJT Fixed Bias ELEC 121

  2. BJT Biasing 1 For Fixed Bias Configuration: • Draw Equivalent Input circuit • DrawEquivalent Output circuit • Write necessary KVL and KCL Equations • Determine the Quiescent Operating Point • Graphical Solution using Loadlines • Computational Analysis • Design and test design using a computer simulation ELEC 121

  3. Complete CE Amplifier with Fixed Bias ELEC 121

  4. Fixed Bias and Equivalent DC Circuit ELEC 121

  5. Fixed-Bias Circuit ELEC 121

  6. DC Equivalent Circuit ELEC 121

  7. Base-Emitter (Input) Loop Using Kirchoff’s voltage law: – VCC + IBRB + VBE = 0 Solving for IB: ELEC 121

  8. Collector-Emitter (Output) Loop Since: IC =  IB Using Kirchoff’s voltage law: – VCC + IC RC + VCE = 0 Because: VCE = VC – VE Since VE = 0V, then: VC = VCE AndVCE =VCC - IC RC Also: VBE = VB - VE with VE = 0V, then: VB = VBE ELEC 121

  9. BJT Saturation Regions When the transistor is operating in the Saturation Region, the transistor is conducting at maximum collector current (based on the resistances in the output circuit, not the spec sheet value) such that: ELEC 121

  10. Determining Icsat ELEC 121

  11. Determining ICSAT for the fixed-bias configuration ELEC 121

  12. Load Line Analysis ELEC 121

  13. Load Line Analysis • The end points of the line are : ICsat and VCEcutoff • For load line analysis, use VCE = 0 for ICSAT, and IC = 0 for VCEcutoff • ICsat: • VCEcutoff: • Where IB intersects with the load line we have the Q point • Q-point is the particular operating point: • Value of RB • Sets the value of IB • Where IB and Load Line intersect • Sets the values of VCE and IC. ELEC 121

  14. Circuit values effect Q-point ELEC 121

  15. Circuit values effect Q-point (continued) ELEC 121

  16. Circuit values effect Q-point (continued) ELEC 121

  17. Load-line analysis ELEC 121

  18. Fixed-bias load line ELEC 121

  19. Example ELEC 121

  20. DC Fixed Bias Circuit Example ELEC 121

  21. Loadline Example Family of Curves ELEC 121

More Related