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Statements. Statements - 강의순서. 병행 (Con current) Statement Concurrent Signal Assignment, Simple Concurrent Signal Assignment, Conditional Concurrent Signal Assignment, Selected Process Statement 순차 ( Sequential Statements) Variable Assignment & Signal Assignment Statement
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Statements - 강의순서 병행(Concurrent) Statement Concurrent Signal Assignment, Simple Concurrent Signal Assignment, Conditional Concurrent Signal Assignment, Selected Process Statement 순차(Sequential Statements) Variable Assignment & Signal Assignment Statement Wait Statement If Statement Case Statement For Loop Statement
Concurrent - Signal Assignment, Simple signal_name <= expression; y <= b; 1) b에 변화가 생길 때마다 b의 값이 y에 출력됨 2) Sensitivity List : b y <= a or b; 1) a 나 b에 변화가 생길 때마다 a or b의 값이 y에 출력됨. 2) Sensitivity List : a,b • 실습34 : 4bit parallel binary adder(pp.521)
Concurrent - Signal Assignment, Conditional signal <= expression1 WHEN boolean_expression1 ELSE expression2 WHEN boolean_expression2 ELSE expression3; • 1) boolean_expression1= 참(True)이면 • signal <= expression1이 실행되며, • 2) boolean_expression2= 참(True) 이면 • signal <= expression2이 실행되며, • 3) 위의 2가지 조건이 모두 성립하지않으면 • signal <= expression3이 실행된다. • 실습35 : Priority Encoder(pp.523)
Concurrent - Signal Assignment, Selected WITH expression SELECT signal <= expression1 WHEN constant_value1, expression2 WHEN constant_value2, expression3 WHEN constant_value3; • 1) expression = constant_value1 이면 • signal <= expression1이 실행되며, • 2) expresion1 = constant_value2 이면 • signal <= expression2이 실행되며, • 3) expresion1 = constant_value3 이면 • signal <= expression3이 실행된다. • 실습37 : Decoder(pp.528)
Concurrent – Process Statement • Process문은 하드웨어 모듈을 기술. • Process문의 내부는 순차처리. • 복잡한 알고리즘의 구현 시 편리 • Declaration syntax : • [Label:] process [( Sensitivity List)] • begin • Sequential statements; • end process [Label]; Sensitivity List에 적혀있는 신호에 변화생길 때 begin과 end process내의 문장을 실행
Sequential–Variable & signal assignment statements target variable := expression; signal y1, y2 : std_logic; ~ process(a, b, c) variable x : std_logic; begin x := a; y1 <= b and x; x := c; y2 <= b or x; end process; end behav; target_signal <= expression [ after time] signal y1, y2 : std_logic; signal x : std_logic; ~ process(a, b, c, x) begin x <= a; y1 <= b and x; x <= c; y2 <= b or x; end process; end behav; • 실습25 : 4bit magnitude comparator(pp.481) • 실습26 : decoder(pp.483)
Sequential– Wait Statement wait on signal [, signal] wait until boolean_expression wait for time_expression Suspends the sequential execution of a process or subprogram (1) wait on a, b; (2) wait until ( x < 100 ); (3) wait for 10 ns; a,b에 변화가 생길 때까지 기다린다. X<100일 때까지 기다린다. 10ns동안 기다린다. • 실습24 : D f/f with reset input (pp.478)
Sequential –Wait on vs. explicit sensitivity list wait on statement process beginy <= a and b; wait on a, b; end process; • Process문을 사용하는 두가지 방식 : 모두 가능함. explicit sensitivity list process (a, b) beginy <= a and b; end process;
Sequential– IF Statement • IF expression1 THEN • statement1-1; • statement1-2; • ELSIF expression2 THEN • statement2-1; • statement2-2; • ELSE • statement3-1; • statement3-2; • END IF; 1) expression1 = 참(True)이면 statement1-1, state1-2가 실행, 2) expression2 = 참(True) 이면 statement2-1, state2-2가 실행, 3) 위의 2가지 조건 모두 성립하지않으면 statement3-1, state3-2가 실행, • 실습28 : 4X1 Mux (pp.496)
Sequential– Case Statement CASE expression IS WHEN constant_value1 => statement1-1; statement1-2; WHEN constant_value2 => statement2-1; statement2-2; WHEN OTHERS => statement3-1; statement3-2; END CASE; 1) expression1 = constant_value1이면 statement1-1, state1-2가 실행, 2) expression1 = constant_value1이면 statement2-1, state2-2가 실행, 3) 위의 2가지 조건 모두 성립하지않으면 statement3-1, state3-2가 실행, • 실습31 : Encoder (pp.505)
Sequential– For Statement loop_label: FOR index_variable IN range LOOP statement1; statement2; END LOOP loop_label; index_variable 의 값을 변해가면서 statement1, statement2를 반복적으로 실행. 아래의 (a), (b)는 모두 같은 표현임. Range는 downto, to의 2가지형태임. loop_Start: FOR i IN 0 to 3 LOOP y(i) <= a(i) and b(i); END LOOP loop_Start; (a) y(0) <= a(0) and b(0); y(1) <= a(1) and b(1); y(2) <= a(2) and b(2); y(3) <= a(3) and b(3); (b) • 실습32 : n-input NAND gate (pp.510)