160 likes | 350 Views
SINANO-NANOSIL Workshop Edinburgh September 19th, 2008. Atomic functionalities in Silicon devices: go beyond the FET by using single dopants and artificial silicon atoms A presentation of the AFSiD european project by Marc SANQUER, Coordinator. Atomic Functionalities on Silicon Devices.
E N D
SINANO-NANOSIL Workshop Edinburgh September 19th, 2008 Atomic functionalities in Silicon devices: go beyond the FET by using single dopants and artificial silicon atoms A presentation of the AFSiD europeanproject by Marc SANQUER, Coordinator http://www.afsid.eu/
Atomic Functionalities on Silicon Devices FET Proactive 2008 NanoICT New Functionalities Coordinator: Dr. Marc SANQUER ( CEA-Grenoble) Team Leaders: Dr. Marco FANCIULLI (Agrate-Brianza), Pf. David JAMIESON (Melbourne), Pf. Dieter KERN (Tübingen), Dr. Sven ROGGE (Delft), Dr. David WILLIAMS (Cambridge) http://www.afsid.eu/
Extracted from AFSiD ABSTRACT ( DoW): ….control of a single charge and spin on individual dopants in silicon… …study single atomic devices, either real (i.e. dopant) or artificial (i.e. quantum dots) … …silicon Single Electron Transistor (SET) of 10 nm, allowing operation at low temperature (but much above 4.2K). … …Devices with one dopant or two dopants will be identified and selected from their electrical characteristics… …These devices are the smallest possible switches using silicon technology. … …Building SET-FET hybrid devices on chip. http://www.afsid.eu/
State of the art: renewed interest for single dopant silicon devices all around the world NTT, Japan CQCT, Australia single-charge-transistor operation by a single-acceptor ( Boron) quantum dot. Atomic placement of single P in Silicon by STM T=26K S.R. Schofield et al. PRL91, 136104 (2003) Y. Ono et al. APL 90, 102106 (2007) Japan: Enhancing semiconductor device performance using ordered dopant arrays T. Shinada et al. Nature 437, 1128 (2007). USA: Linear Stark Effect in a Single Acceptor inside Schottky barrier ( PtSi MOSFETs) L. E. Calvet et al. PRL98, 096805 (2007) http://www.afsid.eu/
State-of-art: SET devices need CMOS integration and high T operation Necessity for a better yield and control in fabrication of SiliconSET towards the fabrication of artificial atoms and molecules in silicon Very good results and devices in NTT, Japan ex: Fujiwara APL 88, 053121(’06) In AFSiD: we use an alternative route using one of the main advantages of CMOS foundries (LETI), i.e. dopant implantation + Melbourne expertise in single dopant implantation + yield and control obtained in CMOS foundries http://www.afsid.eu/
Objectives of AFSID (1) X Nitride sacers metallic gate SOI E doped SOI X • A single atom transistor –based on a single donor in a silicon nanoscopic channel or on an undoped channel forming an artificial atom. H. Sellier et al. PRL 97, 206805 (2006) M. Hofheinz et al. EPJB54, 299-307, (2006). http://www.afsid.eu/
Objectives of AFSID (2) • A Silicon SET used as an electrometer of great stability • in time and robustness, operated at least at T= 4.2K NiSi antenna,coupler top gate Constriction spacer Control Gate 10nm e- SOI QDot http://www.afsid.eu/
DRAIN SOURCE Ibias Idrain control node SET GATE DRAIN Objectives (3) • a SET-FET hybrid circuits made on-chip to implement new functionalities • a silicon device where single spin are detected SOURCE A latching switch(two-terminal, bistable device with hysteretic I − V curves) building block for non volatile memory, logic gates A spin sensitive SET A SET-FET hybrid with non monotonic Id-Vgs characteristics, high current drive See proposal S. Mahapatra et al. (2005) for multivalued logic and memory, or NDR device. Proposal by Likharev et al. (2001) http://www.afsid.eu/
AFSiD Background (1): CMOS + implantation through masks Melbourne Grenoble D. N. Jamieson, et al., APL86, 202101 (2005) M. Hofheinz et al. EPJB54, 299-307, (2006) M. Vinet et al. IEEE EDL26 (2005) H. Sellier et al. PRL97, 206805 (2006) Grenoble Delft http://www.afsid.eu/
MANIPULATION READ OUT QUBIT INITIALIZATION AFSiD Background (2): + multigate-multidot devices Tübingen Hitachi-Cambridge Quantum cellular automaton Charge quantum bit C. Single et al. , APL 78, 1421 (2001) J. Gorman et al. , PRL 95, 090502 (2005) Background in coupled SETs is used to design and measure optimally Silicon Coupled SET or SET-FET devices (including agressive designs down to 10nm size) http://www.afsid.eu/
expected impact of AFSID http://www.afsid.eu/
Exemple of first LETI fabrications (1) LITHOGRAPHY Achievement of High density / low spacing litho S. Pauliac , CEA-LETI High resolution + Overlay accuracy (Precision of alignement between two levels) better than 10nm http://www.afsid.eu/
Example of first LETI fabrications (2) AFTER GATE- ETCHING For AFSiD: several ten’s of designs multi-gates (at active level (in-plane gates) or gate level( top gates) , several implant splits ( source-drain, channel, single dopant implantation) http://www.afsid.eu/
for 10nm SOI SOI Thickness Exemple of first LETI fabrications (3) Choice of the Dopant implantation dose and energies: As or Se DOPANTS SiO2 oxide 2nm included consumption of silicon during gate oxide growth, thermal budget effect (modification of the Gaussian distribution) have been further implemented (not shown) http://www.afsid.eu/
121Sb14+ 70 keV P, As… PMMA PMMA 2x2 mm2 gate GND Vd>0 Undoped Si region N+ h+ e- N+ h+ e- FIB aperture0.1 to 1 mm2 e- BOX Single hits Beam On 0.1 ion/s In-Situ detection of single dopant implantation in Melbourne: 1) By IBIC (Ion Beam Induced Charge) Jamieson et al., APL 86 202101 (2005) 2) By monitoring the change in the source-drain current due to ion impact Batra et al. APL 91, 193502 (2007) http://www.afsid.eu/
To conclude: Collaborations with NANOSIL explicitly in the dissemination Plan of AFSiD AFSiD Schedule (2-20082-2011): First batch available in January 2009, First results during the first Semester of 2009 Second batch start in July 2009. http://www.afsid.eu/