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TMS320 C6xx

C6xx. Architecture. TMS320 C6xx. Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004. On Chip Ex. Memory. Off Chip Ex. Memory. Internal Buses. P E R I P H E R A L S. .D1. .D2. .M1. .M2. Regs (A0-A15). Regs (B0-B15). .L1. .L2. .S1. .S2. Control Regs. CPU.

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TMS320 C6xx

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  1. C6xx Architecture TMS320C6xx Dr. Naim Dahnoun, Bristol University, (c) Texas Instruments 2004

  2. On ChipEx. Memory Off Chip Ex. Memory Internal Buses PERIPHERALS .D1 .D2 .M1 .M2 Regs (A0-A15) Regs (B0-B15) .L1 .L2 .S1 .S2 Control Regs CPU 'C6x - System Block Diagram Harvard PC

  3. ‘C6x - Internal Buses VLIW CPU DMA Read Write

  4. 256 32/64 32/64 32/64 32/64 32/64 'C6x - System Block Diagram Mappate in memoria I/O 32 Mappate in memoria

  5. 'C6x - Peripherals On Chip Off Chip Each of these peripherals has a module dedicated to them and each of these can exist on the C6x

  6. clk1 clk2 clk3 Ad1 Ad2 Ad3 clk0 EMIF

  7. Memory Sizeper device HARVARD Off Chip Memory Fast Slow

  8. HPI / XBUS / PCI

  9. McBSP/ASP and Utopia Bus I2C: Protocollo Seriale Sincrono (due linee bidirezionali, clock e dati sincroni, più la massa) ATM:Asynchronous Transfer Mode

  10. GPIO • LED • SWITCH

  11. DMA / EDMA

  12. Timer/ Counter

  13. Ethernet

  14. Video Ports

  15. VCP / TCP - 3G Wireless

  16. Phase Locked Loop (PLL)

  17. x8 Clock Cycle

  18. C6713 Architecture

  19. C6713-DSK Architecture

  20. CPLDs

  21. C6416Architecture

  22. Fast Slow C6416-DSK Architecture

  23. ‘C6x - Family Part Numbering Ex = TMS320 L C62 01 PKG A 200 • TMS320 = TI DSP • L = Place holder for voltage levels • C6 = C6x family • 2 = Fixed/Floating-point core • 01 = Memory/peripheral configuration • PKG = Pkg designator (actual letters TBD) • A = -40 to 85C (blank for 0 to 70C) • 200 = Core CPU speed in Mhz

  24. Architecture • Links: • C6711 data sheet: tms320c6711.pdf • C6713 data sheet: tms320c6713.pdf • C6416 data sheet: tms320c6416.pdf • User guide C6xx: spru189f.pdf • Errata: sprz173c.pdf

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