An MTCMOS Design Methodology and Its Application to Mobile Computing

1. An MTCMOS Design Methodology and Its Application to Mobile Computing Samsung, Tohoku University in Japan ISLPED’03

2. Introduction • Mobile device requires high performance and low standby power High performance MTCMOS / VTCMOS/ dual Vt High performance Low Vt Low performance Low Vt

3. Preliminaries • MTCMOS • Process VDD Vt leakage exp to maintain performance virtual ground bounce channel width of CCS

4. Preliminaries • Problem: stored data in sleep mode

5. Design issues(1) • Current of CCS • Mutual exclusive pattern • Consider timing • Cluster based partially exclusive pattern • T=RC αVC/I , I α W • Average Current Method (ACM) • Different designs same average ground bounce

6. Design issues(2) • Complementary pass-transistor flip flop 1.Clock low 2.Clock high Edge trigger 3.Sleep mode

7. Floating input problem • IP in SOC always awake in sleep mode

8. Floating prevention circuit (FPC) • Insert tri-state buffer & holder

9. MTCMOS power management PMB is embedded for mobile computing Date-preserving RC of VGND

10. Design flow RTL include PMB (SC & SCB) CPFFs & FPCs insert Power estimation & use ACM

11. Result • Chip features • Leakage is 6000 times smaller than non-MTCMOS

12. Conclusion • Cut-off switches sizing and insertion • CPFF preserve the data • FPC prevent short-circuit current • PMB integrated • Three orders of reduction of leakage