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CLX-6240FX & CLX-6200FX series Hardware

CLX-6240FX & CLX-6200FX series Hardware. Agenda. Outline Composition & Function Trouble shooting. Ⅰ.Outline. Objectives. Understanding the basic structures and function of Hardware Checking & building ability to Trouble Shooting. Ⅱ. Composition & Function. System Configuration.

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CLX-6240FX & CLX-6200FX series Hardware

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  1. CLX-6240FX & CLX-6200FX series Hardware

  2. Agenda • Outline • Composition & Function • Trouble shooting

  3. Ⅰ.Outline Objectives • Understanding the basic structures and function of Hardware • Checking & building ability to Trouble Shooting

  4. Ⅱ. Composition & Function System Configuration

  5. Ⅱ. Composition & Function POWER CORD Block Diagram of CLX-6200 Series Main Controller SMPS MODEM Chorus3 System Power UART LOCAL DEBUG ADDR ADDR USB HOST ISP1761 USB HOST DATA DEVE CRUM I/F FUSER Lamp Control DATA PHY IC (BCM5241) MAC MII ADDR USB 2.0 ISP1582 DATA 1 Lamp FUSER DEVE CRUM Y / M / C / K LOCAL ADDR FLASH HVPS EMPEY Sensor DDR Controller DDR SODIMM DDR_DQ / DDR_SA DDR SDRAM DATA FEED Sensor EEPROM EXIT Sensor I2C LPEC3 ADDR MP JOINT SEN_MPF_EMPTY EEPROM DATA MPF Solenoid CCDM AFE I/F PICK-UP Solenoid AFE DUPLEX Solenoid CCD Sensor DEVE_K Solenoid DEVE_YMC Solenoid DUPLEX Sensor DADF DEVE_YMC MOTOR FAN-FUSER MOTOR OPC_PTB MOTOR Clutch FAN-REAR DEVE_K MOTOR MOTOR AN44060A LSU (4LD,2MOTOR) Sensor Scan Joint Reverse PTB SCF PBA ACR_RIGHT OPE ACR_LEFT REVERSE Clutch MICOM UART REVERSE Sensor 1 LCD REVERSE Sensor 2 TEMP_IN Sensor SCAN MOTOR A3983 TEMP_OUT Sensor HUMIDITY Sensor A3983 Speaker F/Cover Sensor FAN-SMPS CCD HOME Sensor REVERSE MOTOR

  6. POWER CORD Block Diagram of CLX-6240FX Main Controller SMPS SPGPxm System Power UART DEBUG LOCAL MODEM SILAB ADDR ADDR USB HOST ISP1761 USB HOST DATA DEVE CRUM I/F FUSER Lamp Control DATA MAC PHY IC (BCM5241) MII ADDR USB 2.0 ISP1582 DATA 2 Lamp FUSER DEVE CRUM Y / M / C / K MIPS SysAD Bridge SysAD(64bits) PCI LOCAL ADDR FLASH HVPS EMPEY Sensor DDR Controller DDR SODIMM DDR_DQ / DDR_SA DDR SDRAM DATA FEED Sensor EEPROM EXIT Sensor I2C LPEC3 ADDR EEPROM MP JOINT SEN_MPF_EMPTY DATA MPF Solenoid CCDM CIP5 AFE I/F PICK-UP Solenoid PCI Controller AFE DUPLEX Solenoid CCD Sensor DEVE_K Solenoid SDRAM SDRAM Controller DEVE_YMC Solenoid ADDR DUPLEX Sensor DATA DADF DEVE_YMC MOTOR FAN-FUSER MOTOR OPC_PTB MOTOR Clutch FAN-REAR DEVE_K MOTOR MOTOR AN44060A LSU (4LD,2MOTOR) Sensor Scan Joint Reverse PTB SCF PBA ACR_RIGHT OPE ACR_LEFT REVERSE Clutch MICOM UART REVERSE Sensor 1 LCD REVERSE Sensor 2 TEMP_IN Sensor SCAN MOTOR A3983 TEMP_OUT Sensor HUMIDITY Sensor A3983 Speaker F/Cover Sensor FAN-SMPS CCD HOME Sensor REVERSE MOTOR

  7. Ⅱ. Composition & Function Connection Diagram of CLX-6200/6240 CCD HOME SENSOR DADF/ ADF PBA SENS_DADF_P_SIZE BIN FULL SENSOR DADF_MOT SCAN_MOTOR SENS_P_COVER_OPEN DADF_REGI_SOL DADF_PICKUP_SOL OPE PBA DADF_EXIT_SOL SCAN JOINT PBA nSENS_DADF_P_DET Drawer STEP MOTOR DEVEK_CLT FUSER_FAN nSENS_DADF_COVER_OPEN nSENS_DADF_P_POS USB HOST REAR_FAN nSENS_DADF_P_REGI CCDM REVERSE PBA REVERSE_FAN MAIN PBA PTB SPEAKER MEMORY Drawer WLAN BLDC_OPC_MOTOR Switch_SCAN_OPEN SENS_REV_P_SWING BLDC_DEVE_MOTOR SOL_REV_SWING CLUTCH_PICKUP REV_MOT SENS_HUMIDITY SENS_TEMP SENS_REV_P_EXIT SMPS_FAN DEVE_CRUM USB HVPS MP_CLUTCH HDD Drawer LAN SOL_MP SCF SENS_FEED FAX Modem PBA SENS_CST_EMPTY LSU 1,2 LSU 3,4 LSU MOT SENSOR TEMP LSU SMPS FUSER PBA SENS_P_EXIT FUSER Drawer AC_INLET FUSER THERMISTOR

  8. Ⅱ. Composition & Function Main B’D configuration of CLX-6200 Series Engine Control Mechanical Part Electrical Part (Motor & Actuator) (HVPS & Sensors) I/O & PWM Port DATA(15:0) DQ (15:0) FLASH DDR2 SDRAM ADDR (31:1) ROM DDR_SA (13:0) USB Phy MII Chip Chip 3.3V Switching Regulator I2C BUS EEPROM 1.0V Switching Regulator

  9. Main B’D configuration of CLX-6240FX Engine Control Mechanical Part Electrical Part (Motor & Actuator) (HVPS & Sensors) I/O & PWM Port DATA(15:0) DQ (63:0) FLASH DDR1 SDRAM ADDR (31:1) ROM DDR_SA (12:0) USB Phy MII Chip Chip 3.3V Switching Regulator I2C BUS EEPROM 1.2V Switching Regulator

  10. Ⅱ. Composition & Function H/W Configuration (Engine & Controller) Main Board Reverse USB Host HDD HVPS FDB SMPS

  11. Ⅱ. Composition & Function H/W Configuration (Engine & Controller) Panel Scan Joint DADF Main

  12. Ⅱ. Composition & Function H/W Configuration (MAIN BOARD) CLX-6200 Series Main B’D CLX-6240FX Main B’D

  13. Ⅱ. Composition & Function Main B’D CPU : CLX-6200 Series : Chorus3 (SoC) CLX-6240FX : Mips 7065C 533MHz + SPGPXm Memory : - RAM : CLX-6200 : DDR2 Default 128MB + Option 128/256MB CLX-6240 : DDR1 Default 256MB + Option 128/256/512MB - ROM : 16MB+8MB - EEPROM : 64kb Peripherals : - USB 2.0 - 10/100 Based N/W (MII Interface Phy Chip Used) I/O : - Digital I/O Port : Basic I/O, PWM : Motor & HVPS Control - UART : Debug, FAX, OP - I2C : EEPROM & SDRAM & CRUM Interface - Analog I/O Port (ADC : Sensor Interface, DAC : LD Power Control)

  14. Ⅱ. Composition & Function Chorus 3 Architecture CPU Core : ARM9266EJS 360Mhz (I-Cache : 16KB, D-Cache : 16KB) SDRAM Controller : 4 bank DDR1 SDRAM and 4 & 8 bank DDR2 SDRAM (DDR2 2DIMM Used, 166MHz), 120Mhz System Bus ROM Controller : 2 Banks ( 1 Bank Used) I/O Controller : 4 Channel DMA Controller : 3 Channel HPVC : 4 Channel Dual / Single Beam UART : 4 Channels (Debug, OP, FAX 3 Channel used ) Interrupt : 4 External, 64 Internal TIMER : 6 System Timer

  15. Mips + SPGPXm Architecture CPU : Mips IV 533Mhz (I-Cache : 16KB, D-Cache : 16KB, Secondary- Cache : 256KB) SDRAM Controller : 4 bank DDR1 SDRAM (2 DIMM Used) , 120Mhz System Bus ROM Controller : 4 Channel NOR, 1Channel NAND ( 1 Channel NOR Used) I/O Controller : 6 Channel DMA Controller : 4 Channel HPVC : 4 Channel Dual / Single Beam UART : 5 Channels (Debug, OP, FAX 3 Channel used) Interrupt : 10 External TIMER : 6 System Timer

  16. Ⅱ. Composition & Function Memory Interface ROM : - Nor Flash : 16MB(Program ROM) + 8MB(Backup Memory) - Serial Flash : 4MB(6200 Series Only used for backup Memory) - Interface With Chorus 3/SPGPXm ROM Controller SDRAM : - Size : CLX-6200(DDR2) : Default 128MB (Option 128/256MB) CLX-6240(DDR1) : Default 256MB (Option 128/256/512MB) EEPROM : - Size : 64kb - Interface With Chorus 3/SPGPXm I2C Controller CRUM : - Size : 256Byte - Interface With Chorus M I2C Controller via Deve Joint B’D

  17. Ⅱ. Composition & Function I/O Interface High Speed USB 2.0 (High speed 480Mbps / Full speed 12Mbps) N/W Embedded - Chorus 3/SPGPXm With MII Interface - Active LED(Yellow) / Link LED(Green) PWM - High Voltage Control With Duty - Main Motor Clock I2C Interface - NVRAM (system information + network information) - CRUM

  18. Ⅱ. Composition & Function Power Flow SMPS - Type V (standard type) - +24V : For use Mechanical Part (Motor & Actuator (Solenoid, Clutch)), CCDM - +5V : Logic, Analog, Sensor, Main B’D - Supply From SMPS +5V - Power Supply with Regulator (3.3V & 1.2V & 1.0V : Switching Regulator) - 3.3V : I/O Operating (Digital & Analog) - 1.0V : Chorus 3 Core Voltage - 1.2V : SPGPXm Core Voltage HVPS - High Voltage Source for EP Condition - Supply From SMPS +24V - Controlled By PWM Pulse & I/O

  19. Ⅱ. Composition & Function H/W Configuration (FDB) • CLX-6240 • Zero crossing signal detect • 2 lamp (800W+500W) Phase control • CLX-6200 • Zero crossing photo triac • 1 lamp (800W) Pulse control

  20. Ⅲ. Troubleshooting Trouble & Solution

  21. Ⅲ. Troubleshooting Trouble & Solution

  22. Ⅲ. Troubleshooting Trouble & Solution

  23. Ⅲ. Troubleshooting Trouble & Solution

  24. Ⅲ. Troubleshooting Trouble & Solution

  25. Ⅲ. Troubleshooting Trouble & Solution

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