Temperature- Power Consumption Relationship and Hot-spot Migration for FPGA- based System

1. Temperature-Power Consumption Relationship and Hot-spot Migration for FPGA-based System Xun Zhang, Pierre Leray SUPELEC/IETR, Rennes, France Signal, Communication and Embedded Electronics Team supported by Motorola Foundation

2. Outline • Context & Motivation • Power consumption & temperature • Die temperature measurement • Architectural changes • Future Works

3. Outline • Context & Motivation • Power consumption & temperature • Die temperature measurement • Architectural changes • Future Works

4. Context & Motivation (1) • 3% of the world-wide energy is consumed by the ICT infrastructure which causes about 2% of the world-wide CO2 emissions [1] • ICT carbon footprint is comparable to the world-wide CO2 emissions by airplanes or one quarter of the world-wide CO2 emissions by cars. • CO2 reduction at two levels: • To reduce the ICT emission itself • Use ICT to reduce emission of other human activities (transport, tele-working, e-commerce,…..) [1] http://www.cwc.oulu.fi/workshops/W-Green2008.pdf

5. Context & Motivation (2)

6. Influence from CR environments

7. Outline • Context & Motivation • Power consumption & temperature • Die temperature measurement • Architectural changes • Future Works

8. Minimize Iswitch by: Reducing operating voltage Less switching cap Less switching activity Ileak Iswitch Power Dissipation Minimize Ileak by: • Reducing operating voltage • Fewer leaking transistors • Reduce transistor leakage Total Power Dissipation Total Power Dissipation Static PowerDissipation Leakage Power Dissipation Dynamic PowerDissipation Switching Power Dissipation

9. Cgate,i α Cwire Cdiff Dynamic Power dissipation • Dynamic power • Average dynamic power (logic gate) CL: load capacitance α: switching activity f: system frequency Dynamic power is relatively insensitive to temperature

10. Igate Gate Isub Source Drain Static Power Dissipation(cont.) • Static power • Leakage components • Sub-threshold leakage (Isub) • Gate direct-tunneling leakage (Igate) Static power relates directly to temperature

11. Effect of Die temperature • Lifetime • Exponential degradation • Static power • Exponential increase • Circuit delay Simulation on Virtex-5 FPGA plate-form MTTF vs Junction temperature

12. Outline • Context & Motivation • Power consumption & temperature • Die temperature measurement • Architectural changes • Future Works

13. Temperature and Power consumption Max. Temp. is produced during running time Max.Temp. determines cooling system’s performance

14. Ring-oscillator T’=2Nτ’ T=2Nτ τ =T(N/2C)/K

15. Thermal identification • Easy to place • Low power consumption • Few logic resource 2^14 ∑2Nτ 100 MHz Matlab 51-inverter ring oscillator

16. Impact of temperature Total FPGA die temperature Local peak temperature

17. Local thermal characteristic (1)

18. Local thermal characteristic (2) temperature on different sensor position Local heat propriety

19. Local thermal characteristic (3)

20. Local thermal characteristic (4)

21. Dynamically Architectural changes…

22. Hots-pot migration Two identify PEs; Alternate function on different switching frequencies; 1 Hz, ½ Hz, and 1/3 Hz Thermal sensor placement;

23. Result

24. Thermal sensor value

25. summary • Thermal sensor design and implementation • Temperature-Power relationship studying • Possibility to reduce Hotspot effect by using Dynamic Partial Reconfiguration

26. Outline • Context & Motivation • Power consumption & temperature • Die temperature measurement • Architectural changes • Future Works

27. Thermal management for SoC Design T °C Max. Temperature Configuration contraint • Thermalinformation helps to build a thermal modelling • location • working frequency • power consumption • …. T0 Configuration rate =f(T0, Pconfig) Time

28. Thermal management for SoC Design Design-time part: Optimal set of frequencies, parallelism levels for the PE for different working condition Software management policies Hardware management policies Dynamic time part: make a decision to apply one of the predefined sets found in part one. For required system performance and power economics; make a decision to choose a location to apply hotspot migration

29. Future work

30. Hierarchical configuration scenario for homogenous MP area C1 C2 C2 C2 C2 Busy Busy Busy Busy T T T T Thermal Sensor Thermal Sensor Thermal Sensor Thermal Sensor PE1 PE2 PE3 PE4 • Migrating Hotspot • Guarantee performance • Easily to identify PE location with NoC • Overhead of configuration • Circuit Parameters : Frequency, voltage, ... • The most efficient solution • Decease performance Ring topology

31. Configuration scenario Valve of hotspot migrating process • Free choosing at alarm level e.g.: T(1..0)=11 • Interrupts function and copy date from the queue • Locally makes decision without communication with central controller • Add updated status of cluster to central controller Cluster 1 Cluster k

32. Exemple of queue of thermal information • Thermal sensor checks remarkable temperature information and sent alarm info with computing data Computing date ID T(1..0) ID_Cluster ID_PE

33. Summary • Thermal issues in FPGAs will grow as more and more hard blocks are added to the FPGA fabric; • A reduction of few degrees in die temperature could have a high impact on the lifetime, reliability and leakage power of the device, but also cooling system; • Our Digital thermal sensor has shown a flexibility solution to identify local thermal propriety; • Potential ability to use Dynamic Partial Reconfiguration; • Tutorial : thermal sensor implementation;

34. ? Thank you for your attension

35. Detailed configuration scenario • C2: response hot alarm from PE (operator) and check situation of the others PE in the same cluster. • Give an order to do hotspot migrating inside cluster • Require hotspot at higher level • C1: started by requirement of C2. Check situation of the others cluster in the system • Decide hotspot migrating between cluster (entire cluster) • Require circuit parameters modification at the highest level C0: started by requirement of C1 • Partial Frequency scaling or others strategies

36. Configuration process ID Computing date T(1..0)

37. Future works • Configuration scenario development • Comparing with others methods