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UWB Base-band Time/Freq. Synchronization for SFO

UWB Base-band Time/Freq. Synchronization for SFO. Reporter : 黃彥欽 指導教授 : 吳仁銘 博士 2007/01/05 通訊工程研究所 國立清華大學. Outline. MB-OFDM UWB Introduction Tx / Rx Block Diagram Synchronization of SFO Time-domain effect SFO analysis Freq-domain effect Simulation Result Future Work.

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UWB Base-band Time/Freq. Synchronization for SFO

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  1. UWB Base-band Time/Freq.Synchronization for SFO Reporter : 黃彥欽 指導教授 : 吳仁銘 博士 2007/01/05 通訊工程研究所 國立清華大學

  2. Outline • MB-OFDM UWB Introduction • Tx / Rx Block Diagram • Synchronization of SFO • Time-domain effect • SFO analysis • Freq-domain effect • Simulation Result • Future Work

  3. MB-OFDM UWB • Spectrum: • 14 sub-bands • 5 band groups

  4. MB-OFDM UWB

  5. Timing-related parameters

  6. System Parameters (The version 4/2005 post at MBOA web page)

  7. MB-OFDM UWB Tx Generate Training Symbol P Data Source Signal Mapping D+P Inter-leaver Channel encoder Add 128-point IFFT Guard Tone Insert Preamble Insert Guard Interval PAPR Clipping Pulse Shaping PA DAC Time-Freq Code

  8. MB-OFDM UWB Rx Coarse carrier phase Estimation Coarse carrier phase compensation ADC Packet Detection Symbol Timing Estimation + Freq. Hopping Signal Symbol Window Control Remove Guard Interval LPF LNA s/p Phase Offset Estimation Pilot Tracking Estimation P N P Sampling Clock Sync N-point FFT D D Channel Decoder De- Inter- leaver Signal De- mapping Channel Equalization D P/S Decoded Information Bits N Channel Estimation

  9. DAC ADC channel T 2T 3T 4T T’ 2T’ 3T’ Sampling Freq. Offset (SFO) • SFO is caused by sampling instant mismatch between DAC and ADC.

  10. SFO Effects Simulation (Time Domain)

  11. Sampling Freq. Offset (SFO) (cont.) • Effect in Time Domain OFDM Symbol Window Drift FFT window This leads to irreducible ISI ! Need to add/drop 1 sample after every 151 OFDM symbols !

  12. SFO analysis

  13. SFO analysis (cont)

  14. SFO analysis (cont)

  15. SFO analysis (cont)

  16. Coarse CFO Estimator Packet Detection CFO Correction Remove CP FFT Symbol Timing Estimator Data Preamble Residual Carrier Freq. Offset (RCFO) • RCFO is caused by non-exact carrier freq. offset (CFO) correction before FFT.

  17. Sampling Freq. Offset (SFO) (cont.) • Effect in Freq. Domain Sub-carrier Symbol Rotation Phase Rotation pilot The rotated phase is the function of time and different between sub-carriers ! So the receiver has to track and compensate SFO and RCFO continuously in time !

  18. SFO Effects Simulation (Frequency Domain) • Timing offset in time domain resulting in phase rotation in the freq domain

  19. General Method • Use Pilots to estimate SFO • Symmetrically distributed around middle subcarrier • Use the knowledge of the linear relationship between phase rotation of negative (C1) and positive (C2) set. • Received pilot subcarriers • Calculate the rotation of the pilot from this symbol to the previous

  20. General Method (cont) • Take the cumulative phase of for the two sets C1 and C2 • SFO estimation is given by

  21. Our Proposed Method • Estimation Method • We use Least-Square (LS) algorithm to estimate the SFO and RCFO

  22. LS estimation • No probabilistic assumptions about data, only a signal model is assumed • Data Model: • Least Squares error Model inaccuracies Noise x[n] Signal model Perturbation s[n] θ x[n] Error=ε[n] Signal model Σ s[n] θ

  23. LS estimation (cont) • LS error criterion • The value of θthat minimizes J(θ) is the LSE. • If the signal s is linear, we can use matrix notation:

  24. LS estimation (cont) • To find the minimum LS error, setting the gradient • equal to error :

  25. Proposed Method (cont.) Enhance the BER performance by Using LS algorithm !

  26. Simulation of using LS algorithm to estimate the slope and intercept

  27. SFO Simulation (without other noise)

  28. SFO Simulation (with AWGN & CFO)

  29. Add/Drop SFO Compensation 2 Sampling Frequency Offset Recovery • Digital approach in Baseband FFT Channel Equalizer ADC Pilot extraction SFO estimator l : symbol index k : subcarrier index

  30. Future Work • Continue completing all the simulation • Make sure the sync. part will work successfully : • Combine with other parts in Rx-end • Consider the multi-path effect • Chip implementation: • Design the micro-architecture and write RTL code • Verify the system by FPGA board • Tapeout

  31. Thanks for your attention…

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