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ECE 447 Fall 2009

ECE 447 Fall 2009. Lecture 9: TI MSP430 Interrupts & Low Power Modes. Last Lecture: MSP430 Interrupt Class Exercise.

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ECE 447 Fall 2009

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  1. ECE 447 Fall 2009 Lecture 9: TI MSP430 Interrupts & Low Power Modes

  2. Last Lecture: MSP430 Interrupt Class Exercise Write a program that collects samples from input Port 2. A signal line that indicates a new data value is available is connected to pin P1.0. Use an interrupt to detect a rising edge on the P1.0. When an interrupt is triggered the value on Port2 should be stored into a byte array of 32 entries. When 32 samples have been collected, P1.7 should be driven as an output high to indicate the memory is “full”

  3. Lecture 8 Example – Part I #include "io430.h" #include "intrinsics.h" char entries[32]; // Array for storing input from Port 2 (Global Variable) char index; // Index within byte array for Port 2 (Global Variable) void main( void ) { WDTCTL = WDTPW | WDTHOLD; // Stop watchdog timer to prevent time out reset P1DIR = BIT7; // set p1.7 to output P1IE = BIT0; // enable interrupts for p1.0 (default rising edge) __enable_interrupt(); // enable global interrupts index = 0; // initialize the indexer to the beginning of the array for (;;) { __low_power_mode_4(); // go to low power mode } }

  4. Lecture 8 Example – Part II // In the same file as Part I #pragma vector = PORT1_VECTOR __interrupt void p1_isr() { if (!(P1OUT & BIT7)) // Check if Memory is full { entries[index] = P2IN; // store the value on the data port index++; // increment the indexer if (index >= 32) { P1OUT |= BIT7; // set p1.7 high to signal full array } } }

  5. ECE447: MSP430 Non-Maskable Interrupts • An interrupt that cannot be disabled is typically referred to as nonmaskable • Most interrupts in the MSP430 are masked by the GIE bit in the SR and individual control bits. • Some interrupts are not controlled by the GIE, and sometimes referred to as nonmaskable interupts. • However in the MSP430, all interrupts have some bits to be set in order to enable them, even if not masked by the GIE bit in the SR. • All nonmaskable interrupts share a single interrupt vector.

  6. ECE447: MSP430 Handling Interrupts that share an Interrupt Vector • ISR must first identify the source of the interrupt • Service the interrupt and clear as necessary for the source

  7. ECE447: Low Power Modes • The TI MSP430 has four power mode/levels. • Each has different characteristics for: • Memory state • Instruction Execution state • IO state • Timer/Clock state • The MSP430 is highly optimized for low power, further enabled by the proper usage of the low power modes of the device.

  8. ECE447: Low Power Modes - Active Mode • All clocks of the MSP430 are active • MSP430 starts up in this mode, and enters this mode when an interrupt is detected • Only mode where instructions are executing. • Current can range from 200 to 300 µA 0 0 0 0

  9. ECE447: Low Power Modes - LPM0 • LPM0 has the CPU and MCLK disabled. • Used in cases where active peripherals need a high speed SMCLK. • Current is approximately 85 µA 0 0 0 1

  10. ECE447: Low Power Modes - LPM3 • CPU, MCLK, SMCLK, and DCO are disabled • ACLK remains active. • This is the standard low power mode when the MSP430 must awaken itself at regular time intervals, and therefore needs a slow clock. • If the RTC is to be maintained this is the necessary low power mode. • Current is approximately 1 µA 1 1 0 1

  11. ECE447: Low Power Modes - LPM4 • CPU and all clocks are disabled • The MSP430 can only awaken from and external signal. • The mode is know as RAM retention mode • Current is approximately 0.1 µA 1 1 1 1

  12. ECE447: Waking from an LPM (Interrupt Handling) • An interrupt is necessary to exit a LPM. • The MCLK and CPU are started automatically to allow the CPU to service the interrupt. • Since the SR is cleared when an interrupt occurs it is necessary to modify the SR if you wish to return to normal operation after the interrupt service routine exits. • If all processing necessary for service is completed in the interrupt the CPU will return to the low power mode upon exit.

  13. ECE447: Returning to the Main Function from a LPM • To return the Main function after an interrupt wakes the MSP430 from a LPM you must: • Clear all the LPM bits in the SAVED value of SR on the stack. • In C an intrinsic function __low_power_mode_off_on_exit() handles this for you. • In Assembly the programmer must take this burden directly. (The SP will be pointing at the SR on the stack upon entry to the ISR) • Upon exit the modified SR will be restored and normal operation in Active mode will resume.

  14. ECE447: Class Exercise Write a C program that initializes an interrupt on change of input pin P1.4. When the interrupt occurs the input on P2.0-1 will be inverted and output on P1.0-1. When waiting for the interrupt to occur the MSP430 should be in the appropriate LPM that will allow the output to be maintained with the least power consumption.

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