1 / 27

Yield Enhancement for 3D-Stacked Memory by Redundancy Sharing across Dies

Yield Enhancement for 3D-Stacked Memory by Redundancy Sharing across Dies. Li Jiang, Rong Ye and Qiang Xu Presenter : Qiang Xu CU hk RE liable C omputing Laboratory Department of Computer Science & Engineering The Chinese University of Hong Kong. Outline. Introduction Motivation

abla
Download Presentation

Yield Enhancement for 3D-Stacked Memory by Redundancy Sharing across Dies

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Yield Enhancement for 3D-Stacked Memory by Redundancy Sharing across Dies Li Jiang, Rong Ye and QiangXu Presenter: QiangXu CUhkREliableComputing Laboratory Department of Computer Science & Engineering The Chinese University of Hong Kong

  2. Outline • Introduction • Motivation • Redundancy Sharing in 3D-Stacked Memory • Die Matching for Yield Enhancement • Conclusion

  3. Why 3D-stacked Memory? • Small • Die Size • Routing Cost • Reduced • Bus Cap • Latency • Large • Bandwidth Memory Wall CPU-Memory Performance Gap Relative Performance 1980 1990 2000 Now

  4. DRAM TSV 4 Gbit density RD/WR I/O Buffer TSV PCB Interposer 8 strata Peripherals 3 Gbps/pin 3D-Stacked DRAM are Already Here … 2002 Tezzaron: 1Gb,SDRAM NEC:4Gb 2006 Higher Bandwidth SamSung:8Gb 2009 IMEC: DRAM+Logic Closer to Processor Faster GATech+Tezzaron 2010

  5. More self-reparable dies High redundancy cost! To Guarantee Yield for 3D-Stacked Memory … Memory Test: Fault Bitmap × Redundancy Analysis Stack Self-Reparable Dies

  6. Redundancy Analysis for Reparability 1R,2C,Irreparable 1R,2C,Self-Reparable

  7. Redundancy Sharing for Yield Enhancement 1R,2C,Irreparable 0R,3C,Reparable 2R,1C,Reparable 1R,2C,Self-Reparable With the same amount of resources, memory yield can be improved by redundancy sharing!

  8. Redundancy Sharing across Dies Pre-fabricated multiplexor Programmable Decoder Full sharing: NumTSV = NumSpare Row + NumSpare Col What if there are defective TSVs? Repair its own block. Use the rest to repair others

  9. Partial sharing : Less TSVs Redundancy Sharing across Dies Programmable Decoder Pre-fabricated multiplexor

  10. Matching is Critical for the Final Yield Conservative matching: Yield = 50% Self-reparable matching: Yield = 25% Effective matching: Yield = 75% Aggressive matching: Yield = 0%

  11. How to Conduct Die Matching? • Add edges if two • dies are reparable with • redundancy sharing Conduct maximum matching algorithm Construct an undirected graph with each die as an vertex

  12. How to Conduct Die Matching? • How do we know whether two dies are reparable after bonding? • Run final repair algorithm between every pair • Best yield, but time-consuming • We have to estimate whether two dies matched together can form a reparable stack efficiently

  13. Die Matching a.t. Reparability Condition • Fr: faulty bits suitable for row repair • Fc: faulty bits suitable for column repair • Fo: orthogonal faulty bits

  14. Die Matching a.t. Reparability Condition Matched Dies Self-reparable Dies Optimal Matched Dies Matching a.t. reparability condition is rather conservative

  15. Irreparability Condition • Given a bipartite graph G = (V;E), the minimum number of vertices that cover all the edges is equal to the number of edges in any maximum bipartite matching of the graph • Given two memory blocks with redundancy R/C • The maximum bipartite matching of Ga, Gbare |Ma| and |Mb|, the stacked memory is considered to be “reparable” if |Ma| +|Mb| ≤ Ra + Ca +Rb + Cb

  16. Die Matching a.t. Irreparability Condition Reparability is NOT guaranteed due to redundancy configuration!

  17. Die Matching a.t. Irreparability Condition Matched Dies a.t. Irreparability Condition Self-reparable Dies Reparable Dies a.t. Irreparability Condition Optimal Matched Dies Matching a.t. irreparability condition is rather aggressive

  18. Iterative Die Matching • Iterative matching a.t. tightened irreparability condition in each run 0 + |Ma| +|Mb| ≤ Ra + Ca +Rb + Cb Matched Dies a.t. Irreparability Condition Reparable Dies a.t. Irreparability Condition Optimal Matched Dies

  19. Iterative Die Matching • Iterative matching a.t. tightened irreparability condition in each run 1 + |Ma| +|Mb| ≤ Ra + Ca +Rb + Cb Rest of Dies Matched Dies a.t. Irreparability Condition Reparable Dies a.t. Irreparability Condition

  20. Iterative Die Matching • Iterative matching a.t. tightened irreparability condition in each run 2 + |Ma| +|Mb| ≤ Ra + Ca +Rb + Cb

  21. Iterative Die Matching • Iterative matching a.t. tightened irreparability condition in each run k + |Ma| +|Mb| ≤ Ra + Ca +Rb + Cb No more reparable dies found

  22. Experiment Setup • 1000 1Gb Memory, stacked to 2 Layer chips • 4×4 memory blocks, 8k×8k bit-cells • Fault Injection • Poisson distribution with λ = 2.130 • Polya-Eggenberger distribution with λ=2.130 • α = 2.382 (more clustered faults) • α = 0.6232 (evenly-distributed faults) • random TSV faults with faulty rate as 0.1% • six kinds of faults

  23. Experimental Results Poisson Distribution Self-reparable Reparability Matched Irreparability Irreparability Iterative

  24. Experimental Results Case 1 Self Repair Reparability Matched Irreparability Irreparability Iterative Case 2

  25. Experimental Results Polya-Eggenberger Distribution Self Repair Reparability Matched Irreparability Irreparability Iterative α = 0.6232 α = 2.38

  26. Summary • We propose to conduct redundancy sharing across vertical dies in 3D-Stacked Memory • Significant yield enhancement • Minor TSV and routing cost • We present novel solutions for selective die matching to maximize 3D-stacked memory yield

  27. Thank you for your attention !

More Related