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CSCM How-to “A how-to is an informal, often short, description of how to accomplish a specific task. A how-to is usually meant to help non-experts, may leave out details that are only important to experts, and may also be greatly simplified from an overall discussion of the topic.” (from WIKIPEDIA) R. Denz, TE-MPE-EP
CSCM basics – the QPS hardware part • The latest CSCM version uses the same hardware platform as the standard nQPS • This solution provides the same or better safety level for the circuits as during the type test in 2013 but is fully compatible with the nQPS (reduced re-commissioning time, no hardware change) • There are a variety of different protection systems involved: • mDQQBS type board for the bus-bar segments (CSCM configuration) • DQQDS type board for the diode by-passes (CSCM configuration) • DQQDC type board for the HTS current leads (standard operation) • DQQLC type quench loop controllers (linking to PIC) • DQQDB type global circuit protection (disabled during CSCM) • EE systems (bypassed during CSCM) • The configuration of the mDQQBS and DQQDS boards can be changed remotely by QPS specialists • Interventions required for DQQDB and EE systems
Switching from nQPS to CSCM • To switch from nQPS to CSCM the configuration parameters for each of the concerned protection systems need to be changed • DQQDS boards: threshold and filter settings • mDQQBS boards: amplifier gains, threshold and filter settings • The operation can be performed by QPS specialists only using the advanced MACRO tools featured with the latest version of the QPS_EXPERT application (author B.Dupuy BE-OP) • Tools are RBAC protected and restricted to EP staff • Same functionality can be used to change thresholds during CSCM operation • The respective MACRO functions will be provided and training to CSCM operators given • Once in CSCM mode the QPS_OK signal for the corresponding circuit is FALSE during normal operation beam injection and start of power converters is inhibited
Switching from CSCM to nQPS • To switch from CSCM to nQPS the configuration parameters stored in the device FLASH memories will be erased, thus forcing to reboot in default configuration, i.e. nQPS mode • Measures to prevent accidental switching between the two modes • QPS & LHC controls • LSA validation prior to injection; only the nQPS configuration will be stored in LSA no LHC operation with CSCM settings • mDQQBS firmware • Mode stored in program memory cross-checked with the value stored in flash during each cycle; automatic reset in case of inconsistency • PGA settings (=amplifier gains) are refreshed regularly (transparent for operation) • Both measures should prevent an accidental change of state, e.g. provoked by a radiation induced effect
CSCM and QPS Individual System Test (QPS-IST) • The new CSCM concept allows integrating the tests required for the CSCM preparation smoothly into the standard QPS-IST • Prior to CSCM: • Functional test of nQPS crates in QPS labs • CSCM mode will be added to standard test sequence • nQPS cabling verification (continuity and layout) • Local injection of test signals + checked with QPS supervision • Mandatory for nQPS and CSCM • Interlock tests • After CSCM: • Verification of quench heater trigger signals (local by signal injection) • Could be eventually combined with cabling verification • Download of nQPS compensation coefficients • Interlock tests to be completed, i.e. all protection devices to be tested • Quench heater circuit validation (already part of powering)
CSCM and QPS supervision • The new CSCM has to work with the default QPS supervision • No impact on circuit protection but data rates and PM buffer sizes are optimized for nQPS operation • No time to develop a dedicated CSCM version • nQPS supervision has been changed significantly during LS1 • Two basic operational modes LOGGING and PM • LOGGING has two data rates: slow (mDQQBS max. ~2 Hz; to be confirmed) and fast (DQQDS 10 Hz) • Each PM event produces 3 files/circuit: mDQQBS data (max 2.5 Hz, -100,+100 samples (200) A/B interleaved in one file, and PM DQQDS 6410 Hz -512,+1536 samples (2048), one file per board • Thresholds can be set remotely; it is possible but tedious to change settings for each board individually
CSCM operation • The upcoming test in 6-7 will serve as type test; once completed management will decide on the remaining sectors • Procedures and concepts will be validated during the type test • CSCM operators (≠ EP staff!) will be trained • EP specialists (‘ if any left …”) will be present during the type test and strongly support CSCM operation • Debugging, trouble shooting, training … • There are however no resources to provide the same support level for the then standard tests (if approved) 166879
CSCM timeline • 04/06/2014: scary discussion on CSCMlite @ Evian workshop • 05/06/2014: after some brainstorming and tests development of new CSCM concept • 06/06/2014: new concept presented during CSCM meeting • 10/06/2014: presented to TE-TM type test in 6-7 and production of additional circuit boards to equip 8 sectors accepted • 10/06/2014: One CSCM expert breaks his foot … • 12/06/2014: presented to LMC • 16/06/2014: type testing of hybrid firmware completed • 17/06/2014: after the flood … • 18/06/2014: PM data for nQPS correctly generated • 19/06/2014: type test for cabling verification in sector 8-1 • 20/06/2014: first installation of nQPS crates in 6-7 • 27/06/2014: installation & cabling tests completed; interlock loop closed • 30/06/2014: interlock tests to be completed; connection to PIC • 01/07/2014: CSCM test could start Very tight schedule for 1st CSCM slot – extension might be necessary!