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Understanding the basics of the decomposition methods, discussed in the earlier lectures, leads to devising a general and complete decomposition method which can decompose any Boolean function into fixed number of subfunctions with fixed number of inputs. In other words the method is capable of producing a net list of Logic Blocks with fixed numbers of inputs and outputs for any given truth table. The main strategy is in striking a balance between the serial and parallel decomposition.
Multi-level General and Complete Decomposition • It is general because it is not technology specific. • Any FPGA can be targeted. • It is complete because using the two strategies in • functional decomposition we are able to break a • truth table into a network of truth tables of any • desired size.
Maximum Decomposition Theorem (MDT) Let F(X) denote a Boolean function F with a set of input variables X. Let X = A B and A B = , where B is the set of bound variables (G block inputs) and A is the set of free variables (direct inputs to the H block).
For every function F with X inputs, Y outputs, A free variables and B bound variables, if X > 2Y and B > Y2A, there exists a minimal disjoint serial decomposition such that: F = H(G(B),A), where the number of G block outputs = Y2A.
An intriguing situation arises when the process leads to an unitary function for further decomposition. MDT for unitary function For an unitary function f there exists a minimal disjoint serial decomposition and the maximum number of G block outputs is 2A, if B > 2A. i.e.: f = H(G(B),A) where: A B = , A = the number of variables in the set A, and B = the number of variables in the set B.
The practical interpretation of the theorem is significant as it states that a disjoint serial decomposition always exists for an unitary function if B > 2A. Now, if minimum value is assumed for the number of free variables (A = 1) the number of bound variables B is at least 3.
This means that any unitary function with a minimum of four input variables has a disjoint serial decomposition.
x0,…,xn xi G The number of G block outputs does not depend on the number of G block inputs. y’0 y’1 H y0
Any function can be decomposed into subfunctions of three variables. What if we have a FPGA with two-input Logic Cells? Solution: apply non disjoint and complex decompositions.
xx 02 00 0 01 1 10 1 11 0 xx 01 00 0 01 0 10 1 11 0 00 0 01 1 10 1 11 1 y Non-Disjoint Decomposition: Another example xxx y 012 000 0 010 0 001 1 011 1 100 1 110 1 101 1 111 0
x 2 xx 01 00 0 01 1 10 1 11 0 xx 02 00 1 01 1 10 1 11 0 00 0 01 0 10 0 11 1 00 0 01 1 10 0 11 0 00 0 01 1 10 1 11 0 y Complex Decomposition: Example xxx y 012 000 1 010 0 001 1 011 1 100 0 110 1 101 1 111 0
Multi-level Decomposition Theorem (MLDT) Any function F with n input variables and m outputs can be decomposed into a network of Logic Blocks with k inputs and l outputs.
Multi-level Decomposition Method (MDM) Consider a function F: {0,1,-}n {0,1,-}m. Let us try to implement the function using a hypothetical logic block with Cin inputs and Cout outputs, where Cin and Cout are integers and Cin > Cout.
The method first tests "the sensibility" of performing disjoint serial decomposition. As the given LB has Cin inputs and Cout outputs, the ideal serial decomposition is such a decomposition, where the number of G block inputs Gin is equal to the number of LB inputs Cin and the number of G block outputs Gout is equal to the number of LB outputs Cout.
If a serial decomposition is attempted with Gin and Gout as the number of G block inputs and outputs respectively, the resulting H block will have n - (Gin-Gout) inputs. If this number of inputs is not greater than m, then the truth table is split into two parts using parallel decomposition.
In other words, if the number of inputs to the resulting H block is not expected to be greater than the number of its outputs, the truth table is split into two parts using parallel decomposition. Each part then is decomposed separately using the same method being discussed.
If the "sensibility" test is positive and serial decomposition is taken up, the possible existence of a serial decomposition for all combinations of the input variables is verified. This may be time consuming. Therefore, the selection of the "best candidate" variables for the G function and the order in which they are selected are very important research topics.
An example The “sensibility” test will recommend parallel decomposition. The minimal support sets for the two components of F are: y0 : {x0,x1) y1 : {x0,x1,x2).
x1 x3 x0 x2 00 0 01 0 10 0 11 1 00 0 01 1 10 0 11 0 00 0 01 1 10 1 11 0 f0 f1 y Example
It is more interesting to analyze a situation when the number of inputs to the truth table under consideration is greater than Cin, the "sensibility" test described earlier does not recommend parallel decomposition and the iteration is not able to produce any further result.
We increment the value of Gin by one i.e., G'in = Gin + 1. However, before increasing the number of G block inputs, it is made sure that for the given number of inputs Gin, there is no serial decomposition for Gout = Cout, Cout+1,..Gin-1. For a LB with Cin-Cout > 1, the possibility of the existence of a decomposition is verified for Gin = Cin, Cin-1,..Gout+1.
For example, if the selected FPGA LB has 2 inputs and 1 output then the consecutive G block parameters Gin and Gout shall be 2,1; 3,1; 3,2; 4,1; 4,2; 4,3; 5,1 etc. On the other hand, if the selected FPGA LB has 4 inputs and 1 output then the consecutive G block parameters Gin and Gout shall be 4,1; 3,1; 2,1; 4,2; 3,2; 4,3; 5,1 etc.
Example Implement the function using 2:1 LBs.
The truth table has 5 inputs and 2 outputs No 2:1, 3:1 and 3:2 disjoint serial decomposition (dsd) the “sensibility” test would suggest a parallel decomposition since 4:1 dsd is meaningless (the resulting H table will be 2:2). parallel decomposition says that both the outputs depend on all the 5 inputs.
H1 G1 We consider y0 first (i.e., we have a 5:1 function to decompose into 2:1 functions) again, there is no 2:1 dsd; there is a 3:2 dsd. F = H1(G1(x1,x2,x0),x3,x4).
G2 G1 is stored away for further decomposition using the iteration algorithm. We continue with H1 (which is a 4:1 truth table). There is no 2:1 dsd. A 3:1 dsd is found. The resulting G2 and H2 tables are:
Now G1 and G2 are decomposed, followed by y1. That will result in a network of 2:1 logic blocks.