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ECE 232 Hardware Organization and Design Lecture 1 Introduction. Maciej Ciesielski KEB 209 B ciesiel@ecs.umass.edu. Overview. Course organization Syllabus Objective TA’s – to be decided Office hours – to be decided (need your input)
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ECE 232Hardware Organization and DesignLecture 1Introduction Maciej Ciesielski KEB 209 B ciesiel@ecs.umass.edu
Overview • Course organization • Syllabus • Objective • TA’s – to be decided • Office hours – to be decided (need your input) • Textbook: Computer Organizaton and Design: A Hardware-Software Interface, D. Patterson, J. Hennesy, K.M.P., 2nd edition. • Prerequisite: ECE 221 (Logic Design), C or better ! • Everything is on the web, check it frequently: www.ecs.umass.edu/ece/labs/vlsicad/ece232/spr2002/index_232.html • Slides, homework posted on the web prior to class, not distributed • Organization and Anatomy of a Computer
Syllabus ECE 232 • Objectives • Basic concepts in Computer Architecture (MIPS) • Emphasis on digital hardware • Interface: Hardware - Software • Assembly language + simulation (SPIM) • Hardware description languages (VHDL) + simulation (Altera) • Outline • Introduction • Performance • Instruction set architecture, assembly language • Digital Logic (review) • Datapath design, pipelining • Control logic design • Memory hierarchy
Grading Policy • Homework • ~7 assignments, some programming (assembly, VHDL) • Assignments due in class on due date • Penalty for late homework: 20% per day • Homework assignments will be posted on the web, solutionsnot • Grading • Homework 35% • Midterm I 20% (March 5, 7 during class) • Midterm II 20% (April 17 or 22, evening) • Final exam 25% • No CHEATING !!
What you should know from ECE 122 and 232 • Read and write basic C programs • Understand the steps in a makefile, what they do • compile, link, load & execute • Logic design • logical equations, schematic diagrams, • Combinational vs sequential logic • Finite state machines (FSMs) • Basic machine structure • processor, memory, I/O
What is “Computer Architecture” Computer Architecture = Instruction Set Architecture (software) + Machine Organization (hardware)
SOFTWARE Instruction Set Architecture (subset of Computer Arch.) ... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation. – Amdahl, Blaaw, and Brooks, 1964 -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Set -- Instruction Formats -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions
The Instruction Set: a Critical Interface software instruction set hardware
Example ISAs (Instruction Set Architectures) • Digital Alpha 1992 - 2001 • HP PA-RISC 1986 - today • Sun Sparc 1987 - today • SGI MIPS 1986 - ? • Intel (8086,80286,80386, 1978-tomorrow80486,Pentium, MMX, ...)
Logic Designer's View ISA Level Computer Organization • Capabilities and performance characteristics of principal Functional Units (FU) • (Registers, ALU, Shifters, Logic Units, ...) • Ways in which these components are interconnected • Information flows between components • Logic and means by which such information flow is controlled. • Choreography of FUs to realize the ISA • Register Transfer Level (RTL) description FUs and Interconnect
What is “Computer Architecture”? Application • Coordination of many levels of abstraction • Under a rapidly changing set of forces • Design, Measurement, and Evaluation Operating System Compiler Firmware Instruction Set Architecture Instr. Set Proc. I/O system Datapath & Control Digital Design Circuit Design Layout
Course Content Computer Architecture and Engineering Instruction Set Design Computer Organization Interfaces Hardware Components Compiler/System View Logic Designer’s View “Building Architect” “Construction Engineer”
ECE 232: So what's in it for me? • In-depth understanding of the inner-workings of modern computers, their evolution, and trade-offs present at the hardware/software boundary. • Insight into fast/slow operations that are easy/hard to implementation hardware • Experience with the design processin the context of a large complex (hardware) design. • Functional Spec Control & Datapath Physical implementation • Modern CAD tools • Designer's "Conceptual" toolbox.
Conceptual tool box? • Evaluation Techniques • Levels of translation (e.g., Compilation) • Levels of Interpretation (e.g., Microprogramming) • Hierarchy (e.g, registers, cache, memory, disk, tape) • Pipelining and Parallelism • Static / Dynamic Scheduling • Indirection and Address Translation • Synchronous and Asynchronous Control Transfer • Timing, Clocking, and Latching • CAD Programs, Hardware Description Languages, Simulation • Physical Building Blocks (e.g., CLA) • Understanding Technology Trends