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RISC vs. CISC

RISC vs. CISC. Pada amnya, rekabentuk mikro-pemproses menggunakan dua pendekatan iaitu pendekatan RISC dan CISC. RISC Reduced Instruction Set Computer Komputer Set Arahan Terkurang. CISC Complex Instruction Set Computer Komputer Set Arahan Kompleks. KemajuanKomputer (1). Konsep famili

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RISC vs. CISC

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  1. RISC vs. CISC Pada amnya, rekabentuk mikro-pemproses menggunakan dua pendekatan iaitu pendekatan RISC dan CISC. RISC Reduced Instruction Set Computer Komputer Set Arahan Terkurang CISC Complex Instruction Set Computer Komputer Set Arahan Kompleks

  2. KemajuanKomputer (1) • Konsep famili • IBM System/360 1964 • DEC PDP-8 • Separates architecture from implementation • Unit kawalan teraturcara-mikro • Ilham drpd Wilkes 1951 • Dihasilkan oleh IBM S/360 1964 • Memori para (Cache memory) • IBM S/360 model 85 1969

  3. KemajuanKomputer (2) • Solid State RAM • Pemproses-mikro • Intel 4004 1971 • Talianpaip • Memasukkan unsur kesejajaran dalam kitaran ambilan dan perlaksanaan. • Pelbagai pemproses

  4. The Next Step - RISC • Reduced Instruction Set Computer • Ciri-ciri utama • Bil. pendaftar GP yg banyak • atau guna teknologi pengkompilasi untuk mengoptimumkan penggunaan pendaftar • Set arahan yg ringkas/mudah dan terhad. • Menekankan (Tumpuan utama kepada) ciri pengoptimum arahan bertalian-paip

  5. Comparison of processors • CISCRISCSuperscalar • IBM DEC VAX Intel Motorola MIPS IBM Intel • 370/168 11/780 486 88000 R4000 RS/6000 80960 • 1973 1978 1989 1988 1991 1990 1989 • No. of instruction • 208 303 235 51 94 184 62 • Instruction size (octets) • 2-6 2-57 1-11 4 32 4 4 or 8 • Addressing modes • 4 22 11 3 1 2 11 • GP Registers • 16 16 8 32 32 32 23-256 • Control memory (k bytes) (microprogramming) • 420 480 246 0 0 0 0

  6. Kenapa ke arah CISC? • Kos perisian jauh lbh tinggi drpd kos perkakasan. • Peningkatan kekompleksan HLL • Jurang Semantik • Mendorong kpd: • Set2 arahan yg besar • Lbh mod2 pengalamat • Hardware implementations of HLL statements • e.g. CASE (switch) on VAX

  7. Falsafah CISC Kecenderungan utk meringkaskan proses pengkompilsisan (yakni proses pertukaran drpd highlevel ke lowlevel) dan ini menghslkan peningkatan prestasi komputer keseluruhan.

  8. Tujuan CISC • Utk merekabentuk mikro-pemproses yg mana ia boleh melaksanakan penyataan2 yg hempir ke HLL. • Utk meminimumkan bil. arahan yg perlu dilakukan utk tugas yg diberi. • Bagi membolehkan aturcara2 yg bersaiz kecil dibangunkan.

  9. Hasil drpd rekabentuk CISC • Rekabentuk litar menjadi lbh kompleks krn arahan bertambah kompleks. • Mesin pengaturcaraan menjadi lbh mudah krn setiap arahan low level blh dilaksanakan dengan HLL yg bersepadanan. (Kebebasan Pengaturcara) • Ease compiler writing • Meningkat kecekapan perlaksanaan • Complex operations in microcode • Support more complex HLLs

  10. Krateria CISC • Bil. arahan yg byk (selalunya drpd 100 ke 250 arahan). • Terdpt beberapa arahan khas yg kurang kerap digunakan. • Berbagai mod2 pengalamat (selalunya drpd 5 ke 20 mod). • Berbagai pjg format arahan (memerlukan masa penyahkodan yang berlainan). • Pd amnya arahan memanipulasikan operan dlm memori.

  11. Krateria Perlaksanaan. • Operasi dilaksanakan • Operan digunakan • Perlaksanaan berjujukan • Penyelidikan telah dijalankan berdasarkan aturcara yang ditulis dalam HLL • Dynamic studies are measured during the execution of the program

  12. Operasi • Umpukkan (Assignments) • Movement of data • Penyataan bersyarat (IF, LOOP) • Sequence control • Procedure call-return is very time consuming • Sesetengah arahan HLL mengetuai kebanyakan kod2 operasi mesin

  13. Operan • Mengutamakan local scalar variables • Pengoptimuman sepatutnya tertumpu kpd pencapaian local variables Pascal C Purata Integer constant 16 23 20 Scalar variable 58 53 55 Array/structure 26 24 25

  14. Procedure Calls • Penggunaan masa yg lbh • B’gtg kpd bil. parameter dipasskan • B’gtg kpd ‘level of nesting’ • Most programs do not do a lot of calls followed by lots of returns • Most variables are local • (c.f. locality of reference)

  15. Implikasi • Best support is given by optimising most used and most time consuming features • Bil. daftar yg besar • Operand referencing • Careful design of pipelines • Branch prediction etc. • Mempermudahkan (reduced) set arahan

  16. Large Register File • Software solution • Memerlukan compiler utk memperuntuk daftar • Peruntukkan berdasarkan pembolehubah yg kerap diguna dalam suatu julat masa • Memerlukan penganalisa aturcara yg sofisikated • Hardware solution • Lbh daftar • Lbh pembolehubah dlm satu daftar

  17. Pendaftar utk pembolehubah lokal • Menyimpan pembolehubah skalar lokal dlm pendaftar. • Mengurangkan capaian memori • Every procedure (function) call changes locality • Parameters must be passed • Results must be returned • Variables from calling programs must be restored

  18. Register Windows • Hy bbrp parameters • Julat terhad bg call • Guna pelbagai sets of registers yg kecil • Panggil switch ke set of registers yg berlainan • Kembalikan switch ke set of registers yg digunakan sblmnya.

  19. Register Windows cont. • Three areas within a register set • Parameter registers • Local registers • Temporary registers • Temporary registers from one set overlap parameter registers from the next • This allows parameter passing without moving data

  20. Overlapping Register Windows

  21. Circular Buffer diagram

  22. Operation of Circular Buffer • Apabila call dibuat, penunding window semasa akan bergerak memperlihatkan window register semasa yg aktif. • Jk semua window digunakan, sampukan dijanakan dan oldest window (the one furthest back in the call nesting) disimpan dlm memori • A saved window pointer indicates where the next saved windows should restore to

  23. Global Variables • Diperuntukkna oleh compiler ke memory • Inefficient for frequently accessed variables • Ada bbrp set of registers utk global variables

  24. Registers v Cache • Large Register File Cache • All local scalars Recently used local scalars • Individual variables Blocks of memory • Compiler assigned global variables Recently used global variables • Save/restore based on procedure Save/restore based on nesting caching algorithm • Register addressing Memory addressing

  25. Referencing a Scalar - Window Based Register File

  26. Referencing a Scalar - Cache

  27. Compiler Based Register Optimization • Assume small number of registers (16-32) • Optimizing use is up to compiler • HLL programs have no explicit references to registers • usually - think about C - register int • Assign symbolic or virtual register to each candidate variable • Map (unlimited) symbolic registers to real registers • Symbolic registers that do not overlap can share real registers • If you run out of real registers some variables use memory

  28. Graph Coloring • Given a graph of nodes and edges • Assign a color to each node • Adjacent nodes have different colors • Use minimum number of colors • Nodes are symbolic registers • Two registers that are live in the same program fragment are joined by an edge • Try to color the graph with n colors, where n is the number of real registers • Nodes that can not be colored are placed in memory

  29. Graph Coloring Approach

  30. Kenapa CISC (1)? • Compiler simplification? • Dipertikaikan • Complex machine instructions harder to exploit • Optimization more difficult • Smaller programs? • Program ambil sedikit ruang memori ttp… • Memori murah • May not occupy less bits, just look shorter in symbolic form • More instructions require longer op-codes • Register references require fewer bits

  31. Why CISC (2)? • Faster programs? • Bias towards use of simpler instructions • More complex control unit • Microprogram control store larger • thus simple instructions take longer to execute • It is far from clear that CISC is the appropriate solution

  32. Falsafah RISC Ia membabitkan kecenderungan utk mengurangkan masa perlaksanaan dgn m’p’mudah’n ISA komputer.

  33. Matlamat RISC • Mengurangkan kekompleksan litar decoding dan controlling supaya arahan blh dilaksanakan dgn cepat/pantas (very basic instructions). • Lbh memfokuskan kpd peralihan data antara register ke register, drpd register ke memory, krn ia sungguh perlahan).

  34. Hasil drpd RISC • R/btk litar menjadi very simple kerana arahan2nya very simple. • Capaian ke memoriy adlh minimum krn r/btk difokuskan kpd peralihan data ant register ke register. Ini meningkatkan prestasi. • Stp arahan secara puratanya beroperasi dlm single clock cycle. • Mesin pengaturcaraan bg r/btk ini menjadi susah krn programmers perlu mengumpul bersama arahan2 kecil yg byk utk menyelesaikan satu tugas. (Programmer's nightmare)

  35. Krateristik RISC • Bilangan arahan terhad. • Satu arahan per satu kitaran clock. • Mod pengalamat yg ringkas (mainly register to register data transfer). • Format arahan yg ringkas (helps eases decoding). • Penggunaan pipelining utk meningkatkan prestasi.

  36. Kontroversi ant. RISC dan CISC • Apakah yang membezakan RISC drpd CISC? • Bgmn prestasi diukur? (MIPS or transactions per second?) • CISC approach was targeted for broad range of applications. RISC was rather focused. Can RISC be considered better? • RISC programs are 10% to 20% larger than their CISC counterparts. Would they run slower?

  37. RISC v CISC • Not clear cut • Many designs borrow from both philosophies • e.g. PowerPC and Pentium II

  38. RISC Pipelining • Most instructions are register to register • Two phases of execution • I: Instruction fetch • E: Execute • ALU operation with register input and output • For load and store • I: Instruction fetch • E: Execute • Calculate memory address • D: Memory • Register to memory or memory to register operation

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